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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS1995

The Fundamentals of Using the Digital Micromirror Device (DMD(TM)) for Projection Display

Developed by Texas Instruments (TI) the digital micromirror device (DMD(tm)) is a quickly emerging and highly useful micro-electro-mechanical structures (MEMS) device. Using standard semiconductor fabrication technology, the DMD's simplicity in concept and design will provide advantageous solutions for many different applications. At the rudimentary level, the DMD is a precision, semiconductor light switch. In the initial commercial development of DMD technology, TI has concentrated on projection display and hardcopy. This paper will focus on how the DMD is used for projection display. Other application areas are being explored and evaluated to find appropriate and beneficial uses for the DMD.

Yoder, Lars A.↗
NASA NTRS2000

Reliable, Low-Cost, Low-Weight, Non-Hermetic Coating for MCM Applications

Through an Air Force Research Laboratory sponsored STM program, reliable, low-cost, low-weight, non-hermetic coatings for multi-chip-module(MCK applications were developed. Using the combination of Sandia Laboratory ATC-01 test chips, AvanTeco's moisture sensor chips(MSC's), and silicon slices, we have shown that organic and organic/inorganic overcoatings are reliable and practical non-hermetic moisture and oxidation barriers. The use of the MSC and unpassivated ATC-01 test chips provided rapid test results and comparison of moisture barrier quality of the overcoatings. The organic coatings studied were Parylene and Cyclotene. The inorganic coatings were Al2O3 and SiO2. The choice of coating(s) is dependent on the environment that the device(s) will be exposed to. We have defined four(4) classes of environments: Class I(moderate temperature/moderate humidity). Class H(high temperature/moderate humidity). Class III(moderate temperature/high humidity). Class IV(high temperature/high humidity). By subjecting the components to adhesion, FTIR, temperature-humidity(TH), pressure cooker(PCT), and electrical tests, we have determined that it is possible to reduce failures 50-70% for organic/inorganic coated components compared to organic coated components. All materials and equipment used are readily available commercially or are standard in most semiconductor fabrication lines. It is estimated that production cost for the developed technology would range from $1-10/module, compared to $20-200 for hermetically sealed packages.

Jones, Eric W.↗
NASA NTRS2001

Annealing of Solar Cells and Other Thin Film Devices

Annealing is a key step in most semiconductor fabrication processes, especially for thin films where annealing enhances performance by healing defects and increasing grain sizes. We have employed a new annealing oven for the annealing of CdTe-based solar cells and have been using this system in an attempt to grow US on top of CdTe by annealing in the presence of H2S gas. Preliminary results of this process on CdTe solar cells and other thin-film devices will be presented.

Escobar, Hector↗
NASA NTRS2005

Mass Spectrometry for Planetary Probes: Past, Present and Future

Atmospheric entry probes present a unique opportunity for performing quantitative analysis of extra-terrestrial atmospheres in cases where remote sensing alone may not be sufficient and measurements with balloons or aircraft is not practical. An entry probe can provide a complete vertical profile of atmospheric parameters including chemical composition, which cannot be obtained with most other techniques. There are, however, unique challenges associated with building instruments for an entry probe, as compared to orbiters, landers, or rovers. Conditions during atmospheric entry are extreme, there are inherent time constraints due to the short duration of the experiment, and the instrument experiences rapid environmental changes in temperature and pressure as it descends. In addition, there are resource limitations, i.e. mass, power, size and bandwidth. Finally, the demands on the instrument design are determined in large part by conditions (pressure, temperature, composition) unique to the particular body under study, and as a result there is no one-size-fits-all instrument for an atmospheric probe. Many of these requirements can be more easily met by miniaturizing the probe instrument. Our experience building mass spectrometers for atmospheric entry probes leads us to believe that the time is right for a fundamental change in the way spaceflight mass spectrometers are built. The emergence over the past twenty years of Micro-electro- mechanical Systems (MEMS), utilizing lithographic semiconductor fabrication techniques to produce instrument systems in miniature, holds great promise for application to spaceflight mass spectrometry. A highly miniaturized, high performance and low-power mass spectrometer would be an enormous benefit to future entry probe missions, allowing, for example, parallel measurements (e.g., multiple simultaneous gas chromatographic analyses and direct atmospheric leaks.) Such an instrument would also enable mass spectrometry on board small multiple entry probes. In the development of a MEMS Mass Spectrometer, the challenge facing us is to move beyond the proof-of-concept, where research dollars tend to focus, and carry out the detailed work of developing a high performance mass spectrometer system on a chip which meets the unique technical requirements for an atmospheric entry probe described above.

Niemann, Hasso B.↗
NASA NTRS2011

Compact Micromachined Infrared Bandpass Filters for Planetary Spectroscopy

The future needs of space based observational planetary and astronomy missions include low mass and small volume radiometric instruments that can operate in high radiation and low temperature environments. Here we focus on a central spectroscopic component, the bandpass filter. We model the bandpass response of the filters to target the wavelength of the resonance peaks at 20, 40, and 60 micrometers and report good agreement between the modeled and measured response. We present a technique of using common micromachining processes for semiconductor fabrication to make compact, free standing resonant metal mesh filter arrays with silicon support frames. The process can accommodate multiple detector array architectures and the silicon frame provides lightweight mechanical support with low form factor. We also present a conceptual hybridization of the filters with a detector array.

Merrell, Willie C., II↗
NASA NTRS2011

Terahertz Array Receivers with Integrated Antennas

Highly sensitive terahertz heterodyne receivers have been mostly single-pixel. However, now there is a real need of multi-pixel array receivers at these frequencies driven by the science and instrument requirements. In this paper we explore various receiver font-end and antenna architectures for use in multi-pixel integrated arrays at terahertz frequencies. Development of wafer-level integrated terahertz receiver front-end by using advanced semiconductor fabrication technologies has progressed very well over the past few years. Novel stacking of micro-machined silicon wafers which allows for the 3-dimensional integration of various terahertz receiver components in extremely small packages has made it possible to design multi-pixel heterodyne arrays. One of the critical technologies to achieve fully integrated system is the antenna arrays compatible with the receiver array architecture. In this paper we explore different receiver and antenna architectures for multi-pixel heterodyne and direct detector arrays for various applications such as multi-pixel high resolution spectrometer and imaging radar at terahertz frequencies.

direct detector arrays↗
NASA NTRS2014

Dielectric Covered Planar Antennas

An antenna element suitable for integrated arrays at terahertz frequencies is disclosed. The antenna element comprises an extended spherical (e.g. hemispherical) semiconductor lens, e.g. silicon, antenna fed by a leaky wave waveguide feed. The extended spherical lens comprises a substantially spherical lens adjacent a substantially planar lens extension. A couple of TE/TM leaky wave modes are excited in a resonant cavity formed between a ground plane and the substantially planar lens extension by a waveguide block coupled to the ground plane. Due to these modes, the primary feed radiates inside the lens with a directive pattern that illuminates a small sector of the lens. The antenna structure is compatible with known semiconductor fabrication technology and enables production of large format imaging arrays.

Llombart Juan, Nuria↗
NASA NTRS1978

Semiconductor heterostructure

A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the binary and ternary semiconductors wherein in a single temperature step the binary semiconductor substrate is etched, a p-n junction with specific device characteristics is produced in the binary semiconductor substrate by diffusion of a dopant from the melt and a region of the ternary semiconductor of precise conductivity type and thickness is grown by virtue of a change in the melt characteristics when the etched binary semiconductor enters the melt.

Hovel, Harold John↗
NASA NTRS1979

Semiconductor structure

A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the binary and ternary semiconductors wherein in a single temperature step the binary semiconductor substrate is etched, a p-n junction with specific device characteristics is produced in the binary semiconductor substrate by diffusion of a dopant from the melt and a region of the ternary semiconductor of precise conductivity type and thickness is grown by virtue of a change in the melt characteristics when the etched binary semiconductor enters the melt.

Hovel, Harold J.↗
NASA NTRS1992

Scheduling revisited workstations in integrated-circuit fabrication

The cost of building new semiconductor wafer fabrication factories has grown rapidly, and a state-of-the-art fab may cost 250 million dollars or more. Obtaining an acceptable return on this investment requires high productivity from the fabrication facilities. This paper describes the Photo Dispatcher system which was developed to make machine-loading recommendations on a set of key fab machines. Dispatching policies that generally perform well in job shops (e.g., Shortest Remaining Processing Time) perform poorly for workstations such as photolithography which are visited several times by the same lot of silicon wafers. The Photo Dispatcher evaluates the history of workloads throughout the fab and identifies bottleneck areas. The scheduler then assigns priorities to lots depending on where they are headed after photolithography. These priorities are designed to avoid starving bottleneck workstations and to give preference to lots that are headed to areas where they can be processed with minimal waiting. Other factors considered by the scheduler to establish priorities are the nearness of a lot to the end of its process flow and the time that the lot has already been waiting in queue. Simulations that model the equipment and products in one of Texas Instrument's wafer fabs show the Photo Dispatcher can produce a 10 percent improvement in the time required to fabricate integrated circuits.

Kline, Paul J.↗
NASA NTRS1990

Method of fabricating germanium and gallium arsenide devices

A method of semiconductor diode fabrication is disclosed which relies on the epitaxial growth of a precisely doped thickness layer of gallium arsenide or germanium on a semi-insulating or intrinsic substrate, respectively, of gallium arsenide or germanium by either molecular beam epitaxy (MBE) or by metal-organic chemical vapor deposition (MOCVD). The method involves: depositing a layer of doped or undoped silicon dioxide on a germanium or gallium arsenide wafer or substrate, selectively removing the silicon dioxide layer to define one or more surface regions for a device to be fabricated thereon, growing a matched epitaxial layer of doped germanium or gallium arsenide of an appropriate thickness using MBE or MOCVD techniques on both the silicon dioxide layer and the defined one or more regions; and etching the silicon dioxide and the epitaxial material on top of the silicon dioxide to leave a matched epitaxial layer of germanium or gallium arsenide on the germanium or gallium arsenide substrate, respectively, and upon which a field effect device can thereafter be formed.

Jhabvala, Murzban↗
NASA NTRS1978

Multilevel metallization method for fabricating a metal oxide semiconductor device

An improved method is described of constructing a metal oxide semiconductor device having multiple layers of metal deposited by dc magnetron sputtering at low dc voltages and low substrate temperatures. The method provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.

Hollis, B. R., Jr.↗
NASA NTRS2018

Index-Coupled Distributed-Feedback Semiconductor Quantum Cascade Lasers Fabricated Without Epitaxial Regrowth

Quantum cascade (QC) lasers and methods of fabricating such QC lasers are provided. The QC lasers incorporate a DFB grating without requiring the use of relying on epitaxial regrowth processes. The DFB gratings are formed as sidewall gratings along the lateral length of the QC active region, or the DFB gratings are formed atop the lateral length of the QC active region, and wherein the top DFB grating is planarized with a polymeric material.

Briggs, Ryan M.↗