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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Low-dimensional 0D/2D hybrid structures have sparked interest in interfacial carrier dynamics, like charge and energy transfer. They offer potential for electronic and optoelectronic devices such as transistors and photodetectors.
Semiconducting conjugated polymers (CPs) have shown great potential in organic solar cells and organic field-effect transistors (OFETs), due to their tunable electronic and optical properties. In this study, we compare computational predictions of electronic and optical properties of ensembles of cis-polyacetylene (cis-PA) multiple oligomers in two different forms (a) undoped cis-PA and (b) cis-PA doped by phosphorous fluoride (PF¯ 6 ) via density functional theory (DFT) with hybrid functionals. The comparison of undoped cis-PA under the constraint of injected charge carrier and cis-PA doped by PF¯ 6 shows that either doping or injection provides very similar features in electronic structure and optical properties. Doped and injected are similar to each other and different from the pristine, undoped PA. Computed results also indicate that the injection of charge carriers and adding p-type doping into the semiconducting CP model both greatly affect the conductivity. Furthermore, these observations provide a better understanding and practical use of the properties of polyacetylene films for flexible electronic applications.
The implementation of aberration-corrected electron beam lithography (AC-EBL) in a 200 keV scanning transmission electron microscope (STEM) is a novel technique that could be used for the fabrication of quantum devices based on 2D atomic crystals with single nanometer critical dimensions, allowing to observe more robust quantum effects. In this work we study electron beam sculpturing of nanostructures on suspended graphene field effect transistors using AC-EBL, focusing on the in situ characterization of the impact of electron beam exposure on device electronic transport quality. When AC-EBL is performed on a graphene channel (local exposure) or on the outside vicinity of a graphene channel (non-local exposure), the charge transport characteristics of graphene can be significantly affected due to charge doping and scattering. While the detrimental effect of non-local exposure can be largely removed by vigorous annealing, local-exposure induced damage is irreversible and cannot be fixed by annealing. We discuss the possible causes of the observed exposure effects. Our results provide guidance to the future development of high-energy electron beam lithography for nanomaterial device fabrication.
Thin film vacuum deposition semiconductors, electron tunneling devices, and field effect transistors
Hybrid tunnel-diode/transistor integrated circuit squaring counter system for spacecraft
Electronic parts sterilization program noting results on capacitors, resistors, varactor diodes, microcircuits, transistors, transformers, diodes and operating temperatures
Monitoring device differentiates between malfunctions occurring in the system undergoing test and malfunctions within the test instrumentation itself. Electronic circuits in the monitor use transistors to commutate silicon controlled rectifiers by removing the drive voltage, display circuits are then used to monitor multiple discrete lines.
High energy electron irradiation effects on field effect transistors in integrated circuit devices
Gripper handles electronic components without damaging them. Driven by dc motor, movable jaw gently clamps electronic component. Grips such electronic components as resistors, capacitors, and transistors without damaging them and holds them during soldering or other processing.
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A brief overview is presented of the sensors and electronics development work ongoing at NASA Glenn Research Center which is intended to meet the needs of future aerospace applications. Three major technology areas are discussed: 1) high temperature SiC electronics, 2) SiC gas sensor technology development, and 3) packaging of harsh environment devices. Highlights of this work include world-record operation of SiC electronic devices including 500?C JFET transistor operation with excellent properties, atomically flat SiC gas sensors integrated with an on-chip temperature detector/heater, and operation of a packaged AC amplifier. A description of the state-of-the-art is given for each topic. It is concluded that significant progress has been made and that given recent advancements the development of high temperature smart sensors is envisioned.
"Printed circuit boards (PCBs) are the baseline for electronics manufacturing upon which electronic components are mounted and formed into electronic systems. PCBs are used in a variety of electronic circuits from simple one-transistor amplifiers to large super computers. A PCB serves three main functions: 1) it provides the necessary mechanical support for the components in the circuit 2) it provides the necessary electrical interconnections, and 3) it bears some form of legend which identifies the components it carries. The failure modes on the PCBs can be categorized in a hierarchical structure, in which the mechanisms and causes are site or location dependant. This one day workshop will discuss a variety of failure mechanisms that effect the functionality of PCBs. These mechanisms can be related to how PCB materials are selected, PCBs are designed, manufactured, tested and used in the field conditions. The workshop will begin with an overview of PCB manufacturing, materials and processes. With the help of examples and case studies, a wide range of failure mechanisms will be discussed, case studies are focused on digital circuits, however some failures in analog, double sided boards are also presented. The workshop then provides the guideline for selection of methodologies for identifying potential failure mechanisms based on the failure history and how a systematic root cause failure analysis of the PCB can result in prevention of future issues."
The diversification of electronic materials in devices provides a strong incentive for methods to rapidly correlate device performance with fabrication decisions. In this work, we present a low-cost automated test station for gated electronic transport measurements of field-effect transistors. Utilizing open-source PyMeasure libraries for transparent instrument control, the “ATLAS-MAP” system serves as a customizable interface between sourcemeters and samples under test and is programmed to conduct transfer curve and van der Pauw methods with static and sweeping gate voltages. Zinc oxide transistors of variable thickness (5, 10, and 20 nm) and channel size (50 μm to 3 mm, of equal length and width) were fabricated to validate the design. Standardization of testing procedures and raw data formatting enabled automated data analysis. A detailed list of parts and code files for the system are provided.
Two types of measurements were performed on ion thrustors equipped with SmCo magnets in either ring cusp or line cusp arrangements. Langmuir probes were used to measure plasma potential, electron density, and electron temperture in all regions inside the thruster. Loss fluxes to various surfaces were determined by measuring the currents to foils attached to or imbedded in the surface. Data were obtained for several sets of discharge voltages and currents. The loss currents were determined from current vs voltage characteristics observed on a transistor curve tracer oscilloscope. Both ion and electron currents were measured to all parts of the walls and to all parts of the cathode assembly using collecting plates. These measurement were also made for various parameter sets. In line cusp configuration the plasma density is essentially as predicted by existing calculations. In the ring cusp arrangement the interior of the plasma contains an inhomogeneous and relatively large magnetic field so the geometry is decidely two-dimensional and the models of Self (1967) and of Kino and Sham (1966) do not agree.
The n-channel Germanium junction field effect transistor (Ge-JFET) was designed and fabricated for cryogenic applications. The Ge-JFET exhibits superior noise performance at liquid nitrogen temperature (77 K). From the device current voltage characteristics of n-channel JFETs, it is seen that transconductance increases monotonically with the lowering of temperature to 4.2 K (liquid helium temperature).
We report on our effort to develop the world's fastest transistor with the ultimate goal of utilizing them in electronic devices for advancing the present state of RF electronic systems.
An apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate including a first semiconductor material, an array of three dimensional (3D) structures above the substrate, a sidewall heterojunction layer positioned on at least one vertical sidewall of each 3D structure, and an isolation region positioned between the 3D structures. Each 3D structure includes the first semiconductor material. The sidewall heterojunction layer includes a second semiconductor material, where the first and second semiconductor material have different bandgaps.
The progress of the Jet Propulsion Laboratory in developing gallium arsenide junction field-effect transistors (GaAs JFETs) for application in infrared readout electronics operating below 10 Kelvin is discussed.