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A recursive algorithm using the error-trellis decoding technique is developed to decode convolutional codes (CCs). An example, illustrating the very large scale integration (VLSI) architecture of such a decode, is given for a dual-K CC. It is demonstrated that such a decoder can be realized readily on a single chip with metal-nitride-oxide-semiconductor technology.
The metal oxide semiconductor (MOS) capacitor micrometeroid detector consists of a thin dielectric capacitor fabricated on a silicon wafer. In operation, the device is charged to a voltage level sufficiently near breakdown that micrometeoroid impacts will cause dielectric deformation or heating and subsequent arc-over at the point of impact. Each detector is capable of recording multiple impacts because of the self-healing characteristics of the device. Support instrumentation requirements consist of a voltage source and pulse counters that monitor the pulse of recharging current following every impact. An investigation has been conducted in which 0.5 to 5 micron diameter carbonized iron spheres traveling at velocities of 4 to 10 Km/sec were impacted on to detectors with either a dielectric thickness of 0.4 or 1.0 micron. This study demonstrated that an ion microprobe tuned to sufficiently high resolution can detect Fe remaining on the detector after the impact. Furthermore, it is also possible to resolve Fe ion images free of mass interferences from Si, for example, giving its spatial distribution after impact. Specifically this technique has shown that significant amounts of impacting particles remain in the crater and near it which can be analyzed for isotopic content. Further testing and calibration could lead to quantitive analysis. This study has shown that the capacitor type micrometeroid detector is capable of not only time and flux measurements but can also be used for isotopic analysis.
A liquid helium-cooled, 24 detector grating spectrometer was developed and used for low resolution astronomical observations in the 5 to 14 micron spectral range. The instrument operated on the 91 cm Kuiper Airborne Observatory, the 3 m IRTF (Mauna Kea), the 3 m Shane telescope (Lick Observatory), and the 152 cm NASA and University of Arizona telescope. The detectors are discrete Si:Bi photoconductors with individual metal oxide semiconductor field effect transistor preamplifiers operating at 4 K. The system uses a liquid helium-cooled slit, order-sorter filter, collimator mirror, grating, and camera mirror arranged in a Czerny-Turner configuration with a cold stop added between the collimator mirror and the grating. The distances between components are chosen so that the collimator mirror images the secondary mirror of the telescope onto the cold stop, thus providing a very effective baffle. Scattered radiation is effectively reduced by using liquid helium-cooled, black baffles to divide the spectrometer into three separate compartments. The system noise-equivalent flux density, when used on the 152 cm telescope from 8 to 13 microns with a resolving power of 50, is 4.4 x 10 to the minus 17th power W/sq cm micron square root of Hz. The main applications are for measuring continuum radiation levels and solid state emission and absorption features in regions of star and planet formation.
Presently, there are many difficulties associated with implementing application specific custom or semi-custom (standard cell based) integrated circuits (ICs) into JPL flight projects. One of the primary difficulties is developing prototype semi-custom integrated circuits for use and evaluation in engineering prototype flight hardware. The prototype semi-custom ICs must be extremely cost-effective and yet still representative of flight qualifiable versions of the design. A second difficulty is encountered in the transport of the design from engineering prototype quality to flight quality. Normally, flight quality integrated circuits have stringent quality standards, must be radiation resistant and should consume minimal power. It is often not necessary or cost effective, however, to impose such stringent quality standards on engineering models developed for systems analysis in controlled lab environments. This article presents work originally initiated for ground based applications that also addresses these two problems. Furthermore, this article suggests a method that has been shown successful in prototyping flight quality semi-custom ICs through the Metal Oxide Semiconductor Implementation Service (MOSIS) program run by the University of Southern California's Information Sciences Institute. The method has been used successfully to design and fabricate through the MOSIS three different semi-custom prototype CMOS p-well chips. The three designs make use of the work presented and were designed consistent with design techniques and structures that are flight qualifiable, allowing one hour transfer of the design from engineering model status to flight qualifiable foundry-ready status through methods outlined in this article.
The initial testing performed on the Hughes Metal Oxide Semiconductor Direct Readout (MOS DRO) with a Si:In extrinsic infrared array is described. The testing to date was of a screening nature and the results are primarily qualitative rather than quantitative. At a later date the performance optimization phase will be initiated. An encouraging result is that this response is strongly dependent on the detector temperature, to the extent that thermal transients introduced during the chip readout will affect the performance. A responsivity of 1 A/W at 2.2 microns with a bias of 15 volts, which is well below what is optimum bias, was obtained.
Inversion layer (IL) Metal Oxide Semiconductor (MOS) solar cells were fabricated. The fabrication technique and problems are discussed. A plan for modeling IL cells is presented. Future work in this area is addressed.
In an investigation of metal oxide semiconductor field effect transistor (MOFSET) devices, a one-dimensional mathematical model of device dynamics was prepared, from which an accurate and computationally efficient drain current expression could be derived for subsequent parameter extraction. While a critical review revealed weaknesses in existing 1-D models (Pao-Sah, Pierret-Shields, Brews, and Van de Wiele), this new model in contrast was found to allow all the charge distributions to be continuous, to retain the inversion layer structure, and to include the contribution of current from the pinched-off part of the device. The model allows the source and drain to operate in different regimes. Numerical algorithms used for the evaluation of surface potentials in the various models are presented.
Three different finite field multipliers are presented: (1) a dual basis multiplier due to Berlekamp; (2) a Massy-Omura normal basis multiplier; and (3) the Scott-Tavares-Peppard standard basis multiplier. These algorithms are chosen because each has its own distinct features which apply most suitably in different areas. Finally, they are implemented on silicon chips with nitride metal oxide semiconductor technology so that the multiplier most desirable for very large scale integration implementations can readily be ascertained.
A recursive algorithm using the error-trellis decoding technique is developed to decode convolutional codes (CCs). An example, illustrating the very large scale integration (VLSI) architecture of such a decode, is given for a dual-K CC. It is demonstrated that such a decoder can be realized readily on a single chip with metal-nitride-oxide-semiconductor technology.
Experimental study presents examples of empirical modeling of single-event upset in negatively-doped-source/drain metal-oxide-semiconductor static random-access memory cells. Data supports adoption of simplified worst-case model in which cross sectionof SEU by ion above threshold energy equals area of memory cell.
Two hybrid infrared (IR) detector arrays of antimony-doped silicon (Si:Sb) were produced and tested to evaluate their potential for use in low-background IR astronomy applications. The format of the arrays is 58 x 62 elements, with 76 micron-square pixels. A random-access, switched metal-oxide semiconductor field effect transistor (MOSFET) silicon multiplexer is used to read out the array elements. Reduced-background tests of signal, noise, and noise equivalent power were conducted over the temperature range 3.2 to 12 K. The arrays were found to have good sensitivity and good uniformity.
Two modules of gallium-doped germanium (Ge:Ga) infrared detectors with integrated multiplexing readouts and supporting drive electronics were designed and tested. This development investigated the feasibility of producing two-dimensional Ge:Ga arrays by stacking linear modules in a housing capable of providing uniaxial stress for enhanced long-wavelength response. Each module includes 8 detectors (1x1x2 mm) mounted to a sapphire board. The element spacing is 12 microns. The back faces of the detector elements are beveled with an 18 deg angle, which was proved to significantly enhance optical absorption. Each module includes a different silicon metal-oxide semiconductor field effect transistor (MOSFET) readout. The first circuit was built from discrete MOSFET components; the second incorporated devices taken from low-temperature integrated circuit multiplexers. The latter circuit exhibited much lower stray capacitance and improved stability. Using these switched-FET circuits, it was demonstrated that burst readout, with multiplexer active only during the readout period, could successfully be implemented at approximately 3.5 K.
Three different finite-field multipliers are presented: (1) a dual-basis multiplier due to Berlekamp; the Massey-Omura normal basis multiplier; and (3) the Scott-Tavares-Peppard standard basis multiplier. These algorithms are chosen because each has its own distinct features that apply most suitably in different areas. Finally, they are implemented on silicon chips with nitride metal oxide semiconductor technology so that the multiplier most desirable for VLSI implementation can readily be ascertained.
The radiation resistance of ITO/InP cells processed by DC magnetron sputtering is compared to that of standard n/p InP and GaAs homojunction cells. After 20 MeV proton irradiations, it is found that the radiation resistance of the present ITO/InP cell is comparable to that of the n/p homojunction InP cell and that both InP cell types have radiation resistance significantly greater than GaAs. The relatively lower radiation resistance, observed at higher fluence, for the InP cell with the deepest junction depth, is attributed to losses in the cells emitter region. Diode parameters obtained from I sub sc - V sub oc plots, data from surface Raman spectroscopy, and determinations of surface conductivity types are used to investigate the configuration of the ITO/InP cells. It is concluded that thesee latter cells are n/p homojunctions, the n-region consisting of a disordered layer at the oxide semiconductor.
The initial design and evaluation of a 5 kW arcjet power electronics breadboard which as been integrated with a modified 1 kW design laboratory arcjet is presented. A single stage, 5 kW full bridge, pulse width modulated (PWM), power converter was developed which was phase shift regulated. The converter used metal oxide semiconductor field effect transistor (MOSFET) power switches and incorporated current mode control and an integral arcjet pulse ignition circuit. The unoptimized power efficiency was 93.5 and 93.9 percent at 5 kW and 50A output at input voltages of 130 and 150V, respectively. Line and load current regulation at 50A output was within one percent. The converter provided up to 6.6 kW to the arcjet with simulated ammonia used as a propellant.
The initial design and evaluation of a 5 kW arcjet power electronics breadboard which as been integrated with a modified 1 kW design laboratory arcjet is presented. A single stage, 5 kW full bridge, pulse width modulated (PWM), power converter was developed which was phase shift regulated. The converter used metal oxide semiconductor field effect transistor (MOSFET) power switches and incorporated current mode control and an integral arcjet pulse ignition circuit. The unoptimized power efficiency was 93.5 and 93.9 percent at 5 kW and 50A output at input voltages of 130 and 150V, respectively. Line and load current regulation at 50A output was within one percent. The converter provided up to 6.6 kW to the arcjet with simulated ammonia used as a propellant.
Collection of mathematical models includes second-order effects in n-channel, enhancement-mode, metal-oxide-semiconductor field-effect transistors (MOSFET's). When dimensions of circuit elements relatively large, effects neglected safely. However, as very-large-scale integration of microelectronic circuits leads to MOSFET's shorter or narrower than 2 micrometer, effects become significant in design and operation. Such computer programs as widely-used "Simulation Program With Integrated Circuit Emphasis, Version 2" (SPICE 2) include many of these effects. In second-order models of n-channel, enhancement-mode MOSFET, first-order gate-depletion region diminished by triangular-cross-section deletions on end and augmented by circular-wedge-cross-section bulges on sides.
X ray photoelectron spectroscopy (XPS), spectroscopic ellipsometry (SE), and scanning electron microscopy (SEM) were used to study structural and chemical inhomogeneities in several electronic materials and device structures of relevance to radiation hard electronics. The systems studied include metal nitride oxide semiconductor (MNOS) structures, silicon oxynitride (SiO(x)N(y)) formed by the thermal nitridation of SiO2, and semiconductor on insulator (SOI) structures. Studies of MNOS structures suggest that the effect of H2 annealing is to make the Si3N4/SiO2 interface less abrupt by causing interdiffusion of silanol and silamine groups with subsequent oxynitride formation. Another effect of the annealing appears to be to relieve the strain at the SiO2/Si interface.