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At least 73 records · Page 4

AMD Radeon e9173 Low Power PCIE GPU Single Event Effects Test Report

The AMD Radeon Embedded e9170 Graphics Processing Unit (GPU), notably the e9173 Peripheral Component Interconnect Express (PCIE) variant, is of interest to Artemis generation programs with requirements for graphics rendering, compute, artificial intelligence (Ai) with a constraints-requiring piece-part procurement and power consumption of less than 50W. In addition to collecting heavy ion data on this device, a secondary purpose of this test campaign was to validate video capture hardware and software workflows used with GPU, microprocessor and system-on-chip device testing. Five (5) test patterns from the NEPP Processor Enclave (NPE) test suite were used with the e9173. The test patterns covered the operating system’s (OS) idle contribution towards the cross section, matrix math using tensorflow-rocm, two artificial intelligence models developed at NASA GSFC, and an industry standard GPU benchmarking application called Mesa GLXGears.

NASA Technical Memorandum (TM) test report for pos↗

Guideline for Single-Event Effect (SEE) Testing of System on a Chip (SOC) Devices

The use of complex single and multicore processors with significant cache memory, on-chip peripherals, memory controllers, and high speed input/output (IO) that integrate many of the parts of a traditional computer system is becoming more common in space applications. Such devices are often referred to as system on a chip devices (SOCs), even though the term is used somewhat inaccurately due to the lack of analog and mixed signal subcircuits. These devices are complex combinations of single- or multi-core processors with memory controllers, high-speed input/output (IO), and other peripheral structures that formerly would have been handled by off-chip resources. In the past the processors were tested for single event effects (SEE) separately, and the peripherals were often put into custom application-specific integrated circuits (ASICs) along with other resources required by the user. Performance and cost pressures have pushed commercial devices to incorporate many of the functional blocks into a single chip, an SOC. The NASA Electronic Parts and Packaging Program (NEPP) has been examining ways to perform SEE radiation hardness assurance (RHA) testing of these processor-centric SOCs to achieve reasonable understanding of their performance in space missions.

Guertin, Steven M.↗

The Future of Electronics Single Event Effects (SEE) Testing

In this presentation, the driving factors changing the world of single-event effects (SEE) testing will be discussed. This includes both semiconductor technological advances and morphing space system philosophies. Considerations for meeting these new challenges will then follow.

Kenneth A Label↗

Micron MT29F1T08CMHBBJ4 1Tb NAND Flash Memory Single Event Effect Characterization Test Report

The purpose of this testing is to characterize the Single-Event Effect (SEE) response of the Micron MT29F1T08CMHBBJ4 3D NAND Flash memory. The MT29F1T08CMHBBJ4 is a 1Tb NAND Flash memory, consisting of a four-die stack of 256Gb MLC dice packaged in a 132-ball VBGA package. All data presented is the result of testing only the top die (256Gb) of the package. Testing was performed at two heavy-ion cyclotron facilities with an identical test setup, over the course of four test trips from 2017-2019.

Single Event Effect (SEE)↗

Medical Proton Test Facilities (MPTFs) Lessons Learned on the Unique Aspects for Single Event Effects (SEE) Testing of Electronics in the 200 MeV Regime

Ever since the closure of the Indiana University Cyclotron Facility (IUCF) in 2014, there has been an increasing use of medical proton therapy facilities (MPTF) for SEE testing with protons in the 200 MeV or greater regime. This talk covers some of the unique features and considerations for utilizing MPTFs including both logistical and technical aspects. This presentation provides an overview of lessons learned for SEE testing at MPTFs.

Medical Proton Test Facilities (MPTFs)↗