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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
NASA NTRS1993

Single event effects and laser simulation studies

The single event upset (SEU) linear energy transfer threshold (LETTH) of radiation hardened 64K Static Random Access Memories (SRAM's) was measured with a picosecond pulsed dye laser system. These results were compared with standard heavy ion accelerator (Brookhaven National Laboratory (BNL)) measurements of the same SRAM's. With heavy ions, the LETTH of the Honeywell HC6364 was 27 MeV-sq cm/mg at 125 C compared with a value of 24 MeV-sq cm/mg obtained with the laser. In the case of the second type of 64K SRAM, the IBM640lCRH no upsets were observed at 125 C with the highest LET ions used at BNL. In contrast, the pulsed dye laser tests indicated a value of 90 MeV-sq cm/mg at room temperature for the SEU-hardened IBM SRAM. No latchups or multiple SEU's were observed on any of the SRAM's even under worst case conditions. The results of this study suggest that the laser can be used as an inexpensive laboratory SEU prescreen tool in certain cases.

Kim, Q.↗
DOE OSTI2020

Radiation-hard miniature optical engine with high bandwidth

Future silicon trackers will be operated in an intense radiation environment and require large volumes of data to be transmitted off detector. In addition, the optical modules must be of low mass in order to limit multiple scattering and nuclear interactions that would degrade the overall performance of the detector. Here, we present a miniature optical engine that satisfies these constraints. The optical engine consists of an ASIC driving a VCSEL (Vertical Cavity Surface Emitting Laser) array in an optical package. Two ASICs are designed to operate a 12-channel VCSEL array at 1.28 or 5.12 Gb/s per channel, which yields a total data rate of up to 60 Gb/s. The core transistors are fabricated in a 65 nm CMOS process which enhance the radiation-hardness. Each channel contains equalizer (CTLE) and clock-data recovery circuits (CDR) so that the ASIC can restore the highly distorted electrical signal after propagating through several meters of cables of small diameter. The equalizer, CDR, and VCSEL driver are configured via a digital I 2 C chip interface with triple redundant memory to mitigate single event upset (SEU) effects. The bias and modulation currents are controlled by a digital-to-analog converter (DAC). We present the design of the circuit together with the results of the simulations and preliminary measurements.

47 OTHER INSTRUMENTATION↗
NASA NTRS2001

A SEU-Hard Flip-Flop for Antifuse FPGAs

A single event upset (SEU)-hardened flip-flop has been designed and developed for antifuse Field Programmable Gate Array (FPGA) application. Design and application issues, testability, test methods, simulation, and results are discussed.

Katz, R.↗
NASA NTRS2006

Monte Carlo Simulation of Proton Upsets in Xilinx Virtex-II FPGA Using a Position Dependent Q(sub crit) with PROPSET

This paper describes new software simulation code for predicting single event upset data from measured heavy ion data, using methods, code, and algorithms already reported in the open literature. The measured data that is used to compare against the results of this new simulation code has also been reported in the open literature (R. Koga, et al). The new code is not provided as part of this paper, only the methodology used in generating the code. This paper presents results of basic research, not design-to information, and is representative of other papers reported in the open literature (see paper references). Therefore, the content of this paper is suitable for being made publicly available at the IEEE conference and the resulting IEEE journal.

O'Neill, Patrick M.↗
NASA NTRS2006

Electronics Shielding and Reliability Design Tools

It is well known that electronics placement in large-scale human-rated systems provides opportunity to optimize electronics shielding through materials choice and geometric arrangement. For example, several hundred single event upsets (SEUs) occur within the Shuttle avionic computers during a typical mission. An order of magnitude larger SEU rate would occur without careful placement in the Shuttle design. These results used basic physics models (linear energy transfer (LET), track structure, Auger recombination) combined with limited SEU cross section measurements allowing accurate evaluation of target fragment contributions to Shuttle avionics memory upsets. Electronics shielding design on human-rated systems provides opportunity to minimize radiation impact on critical and non-critical electronic systems. Implementation of shielding design tools requires adequate methods for evaluation of design layouts, guiding qualification testing, and an adequate follow-up on final design evaluation including results from a systems/device testing program tailored to meet design requirements.

Wilson, John W.↗
NASA NTRS2014

Radiation Effects of Commercial Resistive Random Access Memories

We present results for the single-event effect response of commercial production-level resistive random access memories. We found that the resistive memory arrays are immune to heavy ion-induced upsets. However, the devices were susceptible to single-event functional interrupts, due to upsets from the control circuits. The intrinsic radiation tolerant nature of resistive memory makes the technology an attractive consideration for future space applications.

Random Access Memory (RAM)↗
NASA NTRS1984

Soft-error generation due to heavy-ion tracks in bipolar integrated circuits

Both bipolar and MOS integrated circuits have been empirically demonstrated to be susceptible to single-particle soft-error generation, commonly referred to as single-event upset (SEU), which is manifested in a bit-flip in a latch-circuit construction. Here, the intrinsic characteristics of SEU in bipolar (static) RAM's are demonstrated through results obtained from the modeling of this effect using computer circuit-simulation techniques. It is shown that as the dimensions of the devices decrease, the critical charge required to cause SEU decreases in proportion to the device cross-section. The overall results of the simulations are applicable to most integrated circuit designs.

Zoutendyk, J. A.↗
NASA NTRS2003

The X-38 Spacecraft Fault-Tolerant Avionics System

In 1995 NASA began an experimental program to develop a reusable crew return vehicle (CRV) for the International Space Station. The purpose of the CRV was threefold: (i) to bring home an injured or ill crewmember; (ii) to bring home the entire crew if the Shuttle fleet was grounded; and (iii) to evacuate the crew in the case of an imminent Station threat (i.e., fire, decompression, etc). Built at the Johnson Space Center, were two approach and landing prototypes and one spacecraft demonstrator (called V201). A series of increasingly complex ground subsystem tests were completed, and eight successful high-altitude drop tests were achieved to prove the design concept. In this program, an unprecedented amount of commercial-off-the-shelf technology was utilized in this first crewed spacecraft NASA has built since the Shuttle program. Unfortunately, in 2002 the program was canceled due to changing Agency priorities. The vehicle was 80% complete and the program was shut down in such a manner as to preserve design, development, test and engineering data. This paper describes the X-38 V201 fault-tolerant avionics system. Based on Draper Laboratory's Byzantine-resilient fault-tolerant parallel processing system and their "network element" hardware, each flight computer exchanges information on a strict timescale to process input data, compare results, and issue voted vehicle output commands. Major accomplishments achieved in this development include: (i) a space qualified two-fault tolerant design using mostly COTS (hardware and operating system); (ii) a single event upset tolerant network element board, (iii) on-the-fly recovery of a failed processor; (iv) use of synched cache; (v) realignment of memory to bring back a failed channel; (vi) flight code automatically generated from the master measurement list; and (vii) built in-house by a team of civil servants and support contractors. This paper will present an overview of the avionics system and the hardware implementation, as well as the system software and vehicle command & telemetry functions. Potential improvements and lessons learned on this program are also discussed.

Kouba,Coy↗
NASA NTRS2009

Radiation tolerant combinational logic cell

A system has a reduced sensitivity to Single Event Upset and/or Single Event Transient(s) compared to traditional logic devices. In a particular embodiment, the system includes an input, a logic block, a bias stage, a state machine, and an output. The logic block is coupled to the input. The logic block is for implementing a logic function, receiving a data set via the input, and generating a result f by applying the data set to the logic function. The bias stage is coupled to the logic block. The bias stage is for receiving the result from the logic block and presenting it to the state machine. The state machine is coupled to the bias stage. The state machine is for receiving, via the bias stage, the result generated by the logic block. The state machine is configured to retain a state value for the system. The state value is typically based on the result generated by the logic block. The output is coupled to the state machine. The output is for providing the value stored by the state machine. Some embodiments of the invention produce dual rail outputs Q and Q'. The logic block typically contains combinational logic and is similar, in size and transistor configuration, to a conventional CMOS combinational logic design. However, only a very small portion of the circuits of these embodiments, is sensitive to Single Event Upset and/or Single Event Transients.

Maki, Gary R.↗
NASA NTRS1994

Uncertainties in radiation effect predictions for the natural radiation environments of space

Future manned missions beyond low earth orbit require accurate predictions of the risk to astronauts and to critical systems from exposure to ionizing radiation. For low-level exposures, the hazards are dominated by rare single-event phenomena where individual cosmic-ray particles or spallation reactions result in potentially catastrophic changes in critical components. Examples might be a biological lesion leading to cancer in an astronaut or a memory upset leading to an undesired rocket firing. The risks of such events appears to depend on the amount of energy deposited within critical sensitive volumes of biological cells and microelectronic components. The critical environmental information needed to estimate the risks posed by the natural space environments, including solar flares, is the number of times more than a threshold amount of energy for an event will be deposited in the critical microvolumes. These predictions are complicated by uncertainties in the natural environments, particularly the composition of flares, and by the effects of shielding. Microdosimetric data for large numbers of orbits are needed to improve the environmental models and to test the transport codes used to predict event rates.

Mcnulty, P. J.↗
NASA NTRS2007

Simulation of SEU Cross-sections using MRED under Conditions of Limited Device Information

This viewgraph presentation reviews the simulation of Single Event Upset (SEU) cross sections using the membrane electrode assembly (MEA) resistance and electrode diffusion (MRED) tool using "Best guess" assumptions about the process and geometry, and direct ionization, low-energy beam test results. This work will also simulate SEU cross-sections including angular and high energy responses and compare the simulated results with beam test data for the validation of the model. Using MRED, we produced a reasonably accurate upset response model of a low-critical charge SRAM without detailed information about the circuit, device geometry, or fabrication process

Lauenstein, J. M.↗
NASA NTRS2022

Mission Radiation Environment Modeling and Analysis: Avionics Trade Study for GCD Rad-Neuro Project

The two main objectives of this trade study are characterizing the mission radiation environment for multiple Design Reference Missions (DRM) and analysis of radiation effects on avionics with the goal of producing radiation tolerant Neuromorphic Computing processor chips with innovative radiation-induced fault mitigation. The NASA process for defining radiation requirements for flight avionics is applied to this domain. The effects of trapped protons and electrons in the Van Allen radiation belts predominates in Low-Earth-Orbit (LEO) and the solar wind, solar flares and Galactic Cosmic Rays (GCRs) are the dominant radiation challenge in the open space between the planets of our solar system. The nature and energy of the particles that cause circuit upset and failure is very different in the two regimes. Two results are produced from the radiation models: determining the Total Integrated Dose (TID) experienced by avionics for a given DRM and predicting the Single Event Effects (SEE) rates for avionics during high rate exposure. These tools are applied to existing semiconductors and can be used for predicting the radiation performance of future semiconductors based on early radiation testing of new devices.

Space Radiation↗
NASA NTRS1984

Computing in the presence of soft bit errors

It is shown that single-event-upsets (SEUs) due to cosmic rays are a significant source of single bit error in spacecraft computers. The physical mechanism of SEU, electron hole generation by means of Linear Energy Transfer (LET), it discussed with reference made to the results of a study of the environmental effects on computer systems of the Galileo spacecraft. Techniques for making software more tolerant of cosmic ray effects are considered, including: reducing the number of registers used by the software; continuity testing of variables; redundant execution of major procedures for error detection; and encoding state variables to detect single-bit changes. Attention is also given to design modifications which may reduce the cosmic ray exposure of on-board hardware. These modifications include: shielding components operating in LEO; removing low-power Schottky parts; and the use of CMOS diodes. The SEU parameters of different electronic components are listed in a table.

Rasmussen, R. D.↗
NASA NTRS2004

Frequency dependence of single-event upset in advanced commercial PowerPC microprocessors

Single-event upset (SEU) from heavy ions is measured for advanced commercial microprocessors in a dynamic mode with clock frequencies up to 1 GHz. Frequency and core voltage dependence of SEUs in registers and D-Cache are discussed. The results of our studies suggest the SEU in registers and D-Cache tend to increase with frequency. This might have important implications for the overall SEU trend as technology moves toward higher frequencies.

Farmanesh, F. F.↗
DOE OSTI2020

Annual LDRD Report (FY2019)

The performance of Nuclear Deterrence (ND) systems could be improved by adopting advanced commercial CMOS technologies. However, the radiation hardness of these ND systems must be assured. This project quantified dose rate upset thresholds, allowing us to evaluate whether advanced commercial technologies can be used in rad hard applications. This project also evaluated the susceptibility of advanced commercial technologies to neutron displacement damage and single event effects, and developed hardness assurance methods. As a result of this work, Sandia is now collaborating more closely with DoD agencies and their contractors to understand and improve the radiation hardness of advanced commercial technologies. Sandia Capabilities (SPHINX, lon Beam Lab, FPGA test capabilities) were developed and are being utilized by other programs. Staff were trained to do radiation survivability testing and developed proposals that were funded. Internal and external collaborations and partnerships were developed, including with Georgia Tech. This project received the Best Paper award at the 2019 Hardened Electronics And Radiation Technology (HEART) Conference.

36 MATERIALS SCIENCE↗
NASA NTRS2008

Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

LaBel, Kenneth A.↗
NASA NTRS1996

Galactic cosmic radiation model and its applications

A model for the differential energy spectra of galactic cosmic radiation as a function of solar activity is described. It is based on the standard diffusion-convection theory of solar modulation. Estimates of the modulation potential based on fitting this theory to observed spectral measurements from 1954 to 1989 are correlated to the Climax neutron counting rates and to the sunspot numbers at earlier times taking into account the polarity of the interplanetary magnetic field at the time of observations. These regression lines then provide a method for predicting the modulation at later times. The results of this model are quantitatively compared to a similar Moscow State University (MSU) model. These model cosmic ray spectra are used to predict the linear energy transfer spectra, differential energy spectra of light (charge less than or = 2) ions, and single event upsets rates in memeory devices. These calculations are compared to observations made aboard the Space Shuttle.

Badhwar, G. D.↗