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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4

Single Event Upset Behavior of CMOS Static RAM Cells

An improved state-space analysis of the CMOS static RAM cell is presented. Introducing theconcept of the dividing line, the critical charge for heavy-ion-induced upset of memory cells can becalculated considering symmetrical as well as asymmetrical capacitive loads. From the criticalcharge, the upset-rate per bit-day for static RAMs can be estimated.

Lieneweg, Udo↗

Closed-Loop Performance Measures for Flight Controllers Subject to Neutron-Induced Upsets

It has been observed that atmospheric neutrons can produce single event upsets in digital flight control hardware. The phenomenon has been studied extensively at the chip level, and now system level experiments are underway. In this paper analytical closed-loop performance measures for the tracking error are developed for a plant that is stabilized by a recoverable computer system subject to neutron induced upsets. The underlying model is a Markov jump-linear system with process noise. The steady-state tracking error is expressed in terms of a generalized observability Gramian.

Gray, W. Steven↗

Proton Upset Monte Carlo Simulation

The Proton Upset Monte Carlo Simulation (PROPSET) program calculates the frequency of on-orbit upsets in computer chips (for given orbits such as Low Earth Orbit, Lunar Orbit, and the like) from proton bombardment based on the results of heavy ion testing alone. The software simulates the bombardment of modern microelectronic components (computer chips) with high-energy (.200 MeV) protons. The nuclear interaction of the proton with the silicon of the chip is modeled and nuclear fragments from this interaction are tracked using Monte Carlo techniques to produce statistically accurate predictions.

O'Neill, Patrick M.↗

Analysis of Control Strategies for Aircraft Flight Upset Recovery

This paper proposes a framework for studying the ability of a control strategy, consisting of a control law and a command law, to recover an aircraft from ight conditions that may extend beyond the normal ight envelope. This study was carried out (i) by evaluating time responses of particular ight upsets, (ii) by evaluating local stability over an equilibrium manifold that included stall, and (iii) by bounding the set in the state space from where the vehicle can be safely own to wings-level ight. These states comprise what will be called the safely recoverable ight envelope (SRFE), which is a set containing the aircraft states from where a control strategy can safely stabilize the aircraft. By safe recovery it is implied that the tran- sient response stays between prescribed limits before converging to a steady horizontal ight. The calculation of the SRFE bounds yields the worst-case initial state corresponding to each control strategy. This information is used to compare alternative recovery strategies, determine their strengths and limitations, and identify the most e ective strategy. In regard to the control law, the authors developed feedback feedforward laws based on the gain scheduling of multivariable controllers. In regard to the command law, which is the mechanism governing the exogenous signals driving the feed- forward component of the controller, we developed laws with a feedback structure that combines local stability and transient response considera- tions. The upset recovery of the Generic Transport Model, a sub-scale twin-engine jet vehicle developed by NASA Langley Research Center, is used as a case study.

Crespo, Luis G.↗

Analysis of the Radiated Field in an Electromagnetic Reverberation Chamber as an Upset-Inducing Stimulus for Digital Systems

Preliminary data analysis for a physical fault injection experiment of a digital system exposed to High Intensity Radiated Fields (HIRF) in an electromagnetic reverberation chamber suggests a direct causal relation between the time profile of the field strength amplitude in the chamber and the severity of observed effects at the outputs of the radiated system. This report presents an analysis of the field strength modulation induced by the movement of the field stirrers in the reverberation chamber. The analysis is framed as a characterization of the discrete features of the field strength waveform responsible for the faults experienced by a radiated digital system. The results presented here will serve as a basis to refine the approach for a detailed analysis of HIRF-induced upsets observed during the radiation experiment. This work offers a novel perspective into the use of an electromagnetic reverberation chamber to generate upset-inducing stimuli for the study of fault effects in digital systems.

Torres-Pomales, Wilfredo↗

Virtex-4VQ dynamic and mitigated single event upset characterization summary

This report is the result of funding by the NASA Electronic Parts and Packaging Program (NEPP) and the combined efforts of members within the Xilinx Radiation Test Consortium (XRTC), sometimes known as the Xilinx Single Event Effects (SEE) Test Consortium. The XRTC is a voluntary association of aerospace entities, including leading aerospace companies, universitie and national laboratories, combining resources to characterize reconfigurable, field programmable gate arrays (FPGAs) for aerospace applications. Previous publications of Virtex-4 radiation results are for commercial (non-epitaxial) devices; see, for example, Refs. 1–5. A notable exception is Ref. 6, which presents XRTC upset measurements of storage elements in the PowerPC405s in the XQR4VFX60. This work represents a continuation of the efforts reported in the “Virtex-4QV Static SEU Characterization Summary” [7]. The contents of this report describe various Single Event Functional Interrupt (SEFI) and Single Event Upset (SEU) modes seen while dynamically exercising the clocked resources within Virtex-4 devices and the corresponding mitigation techniques related to the aforementioned observed SEFI modes.

Allen, Gregory↗

Surviving the Improbable: Upset Prevention and Recovery in Flight Control

Slides for an invited presentation (as part of a series) at Santa Clara University, invited by prof. Mohammad Ayoubi. The slides are an overview and summary of past and current research projects in the field of envelope protection, upset prevention and stall recovery guidance, with the aim to avoid loss of control accidents and improve safety in air transportation. The overall aim of this presentation series is to inspire students and to show them possible opportunities that they can pursue for their later careers paths.

upset recovery↗

Single event upset susceptibility testing of the Xilinx Virtex II FPGA

Heavy ion testing of the Xilinx Virtex IZ was conducted on the configuration, block RAM and user flip flop cells to determine their single event upset susceptibility using LETs of 1.2 to 60 MeVcm^2/mg. A software program specifically designed to count errors in the FPGA is used to reveal L1/e values and single-event-functional interrupt failures.

FPGA Xilinx Virtex static test single event upset↗

Single-event upset in highly scaled commercial silicon-on-insulator PowerPc microprocessors

Single event upset effects from heavy ions are measured for Motorola and IBM silicon-on-insulator (SOI) microprocessors with different feature sizes, and core voltages. The results are compared with results for similar devices with build substrates. The cross sections of the SOI processors are lower than their bulk counterparts, but the threshold is about the same, even though the charge collections depth is more than an order of magnitude smaller in the SOI devices. The scaling of the cross section with reduction of feature size and core voltage dependence for SOI microprocessors discussed.

single event upset (SEU)↗

Single-Event Upset and Scaling Trends in New Generation of the Commercial SOI PowerPC Microprocessors

Single-event upset effects from heavy ions are measured for Motorola silicon-on-insulator (SOI) microprocessor with 90 nm feature sizes. The results are compared with previous results for SOI microprocessors with feature sizes of 130 and 180 nm. The cross section of the 90 nm SOI processors is smaller than results for 130 and 180 nm counterparts, but the threshold is about the same. The scaling of the cross section with reduction of feature size and core voltage for SOI microprocessors is discussed.

silicon on insulator↗

Cable/Antenna Bounds Connecting Field Levels To Personnel Safety And Electronic Upset Thresholds

We use bounding models to estimate the power delivered to interior ordnance as well as the pin level voltages along a cable at interior electronic components. The procedures underlying these estimates are described in some detail. Conservation of steady-state power in a linear passive system underpins the power estimate, whereas, losses and quality factor limits underpin the limits on voltage transformations. The final levels are compared to no-fire threshold power and to minimum upset voltage levels in an example using a canonical slot aperture and cavity to estimate interior fields.

42 ENGINEERING↗