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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 721 records · Page 40
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

Cellulose synthase interactive1- and microtubule-dependent cell wall architecture is required for acid growth in Arabidopsis hypocotyls

Auxin-induced cell elongation relies in part on the acidification of the cell wall, a process known as acid growth that presumably triggers expansin-mediated wall loosening via altered interactions between cellulose microfibrils. Cellulose microfibrils are a major determinant for anisotropic growth and they provide the scaffold for cell wall assembly. Little is known about how acid growth depends on cell wall architecture. To explore the relationship between acid growth-mediated cell elongation and plant cell wall architecture, two mutants (jia1-1 and csi1-3) that are defective in cellulose biosynthesis and cellulose microfibril organization were analyzed. The study revealed that cell elongation is dependent on CSI1-mediated cell wall architecture but not on the overall crystalline cellulose content. We observed a correlation between loss of crossed-polylamellate walls and loss of auxin- and fusicoccin-induced cell growth in csi1-3. Furthermore, induced loss of crossed-polylamellate walls via disruption of cortical microtubules mimics the effect of csi1 in acid growth. We hypothesize that CSI1- and microtubule-dependent crossed-polylamellate walls are required for acid growth in Arabidopsis hypocotyls.

59 BASIC BIOLOGICAL SCIENCES↗
DOE OSTI2023

Revealing the Internal Architecture of Alkaline Fuel Cell Membranes with Cryo-4D-STEM and Cryo-STEM-EELS

Characterization of the internal architecture of polymer materials plays an important role in the development of energy devices such as fuel cells. The beam sensitivity of polymer materials coupled with their inherent low contrast makes imaging using conventional TEM and STEM techniques a challenge. Here, we demonstrate robust mapping of the internal architecture of fuel cell polymer membranes using cryo-4D-STEM and cryo-STEM-EELS. Here, we will focus on characterization of alkaline anion exchange membranes (AAEMs) used in AAEM fuel cells, a cheaper alternative to current fuel cell technologies as they allow for platinum group metal-free catalysts. In fuel cell polymer membranes, the internal architecture is critical in performance metrics such as conductivity, mechanical durability, and chemical stability.

30 DIRECT ENERGY CONVERSION↗
DOE OSTI2026

Hybrid Oscillator-Qubit Quantum Processors: Instruction Set Architectures, Abstract Machine Models, and Applications

This tutorial offers a pedagogical guide to hybrid quantum processors that integrate discrete-variable (DV) qubits and continuous-variable (CV) oscillators. Aimed at computer scientists, engineers, and physicists, it provides an overview of the experimental, algorithmic, and architectural aspects of this novel and rapidly developing hardware model. Experimental realizations of this model include superconducting, trapped-ion, and neutral-atom platforms. By combining DV and CV components, hybrid oscillator-qubit processors enable a powerful new paradigm that offers complementary strengths for quantum control, error correction, computation, and simulation. Working toward the goal of a full-stack system connecting applications to CV-DV hardware, we define and formulate abstract machine models and instruction set architectures. These essential abstractions enable codesign of hardware and software, and resource estimation for exploring the potential of current and future hardware for computational and simulation tasks. Using these abstractions, we present both new and existing examples that illustrate the benefits of hybrid CV-DV processors relative to traditional DV-only hardware in computation as well as quantum simulation of physical models. Examples include algorithms for transferring states between DV and CV systems, performing the quantum Fourier transform, and simulation of lattice gauge theories. Relative to qubit-only hardware, the bosonic degrees of freedom natively available in hybrid architectures can substantially reduce the circuit complexity of simulations for physical models containing bosons. A key technique is the extension of quantum signal processing ideas to CV-DV systems. This work is intended to serve as a timely and comprehensive guide to this relatively unexplored yet promising approach to quantum computation and to provide a road map to guide future development.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
DOE OSTI2016

3D sorghum reconstructions from depth images identify QTL regulating shoot architecture

Dissecting the genetic basis of complex traits is aided by frequent and nondestructive measurements. Advances in range imaging technologies enable the rapid acquisition of three-dimensional (3D) data from an imaged scene. A depth camera was used to acquire images of sorghum (Sorghum bicolor), an important grain, forage, and bioenergy crop, at multiple developmental time points from a greenhouse-grown recombinant inbred line population. A semiautomated software pipeline was developed and used to generate segmented, 3D plant reconstructions from the images. Automated measurements made from 3D plant reconstructions identified quantitative trait loci for standard measures of shoot architecture, such as shoot height, leaf angle, and leaf length, and for novel composite traits, such as shoot compactness. The phenotypic variability associated with some of the quantitative trait loci displayed differences in temporal prevalence; for example, alleles closely linked with the sorghum Dwarf3 gene, an auxin transporter and pleiotropic regulator of both leaf inclination angle and shoot height, influence leaf angle prior to an effect on shoot height. Furthermore, variability in composite phenotypes that measure overall shoot architecture, such as shoot compactness, is regulated by loci underlying component phenotypes like leaf angle. As such, depth imaging is an economical and rapid method to acquire shoot architecture phenotypes in agriculturally important plants like sorghum to study the genetic basis of complex traits.

59 BASIC BIOLOGICAL SCIENCES↗
DOE OSTI2021

Standard Modular Architecture for Consumer End Plug and Play Interfaces

The growth in load and generation sources at the edge of the grid is driving the innovation in power electronic (PE) grid interfaces at the consumer end to improve the grid resiliency, reliability, security, and cost of the future infrastructure. Novel PE technologies are key enablers for the future grid infrastructure to handle the issues that arise because of the projected growth. This paper introduces a novel fundamental building block (FBB) architecture with plug-and play features. An example framework that enables co-ordination of multiple FBBs hierarchically to provide various grid functions is also presented. The FBBs are designed to be equipped with advanced features like online health monitoring, embedded intelligence, and decision-making capability for enhancing the metrics of consumer end plug and play interfaces. The paper elaborates on the proposed architecture and the developed framework i.e., the controls, communication, protection, and the corresponding timing requirements for the building blocks. The architecture and the framework have been validated through simulations and the communication framework has been validated with a control hardware in the loop platform.

Chinthavali, Madhu Sudhan↗
DOE OSTI2015

Techniques for Enabling Highly Efficient Message Passing on Many-Core Architectures

Many-core architecture provides a massively parallel environment with dozens of cores and hundreds of hardware threads. Scientific application programmers are increasingly looking at ways to utilize such large numbers of lightweight cores for various programming models. Efficiently executing these models on massively parallel many-core environments is not easy, however and performance may be degraded in various ways. The first author's doctoral research focuses on exploiting the capabilities of many-core architectures on widely used MPI implementations. While application programmers have studied several approaches to achieve better parallelism and resource sharing, many of those approaches still face communication problems that degrade performance. In the thesis, we investigate the characteristics of MPI on such massively threaded architectures and propose two efficient strategies -- a multi-threaded MPI approach and a process-based asynchronous model -- to optimize MPI communication for modern scientific applications.

Si, Min↗
DOE OSTI2022

Charaterization of Emerging Computing Architectures for Dynamic Simulation of Future Power Grids with Large-Scale Power Electronics

The increasing penetration of power electronics in power grids significantly raises the computing requirements in a real-time (and/or fast) simulation of the power grid. The real-time simulation is an enabler for evaluating controllers, protection systems, new equipment, and twinning. In this paper, emerging computing architectures such as tensor processing units (TPU), neural/neuromorphic processing units (NPU), and quantum processing units (QPU) are introduced and characterized for the real-time (and/or fast) simulation of power electronics-dominated power grids. The metrics and the process to characterize emerging computing architectures to perform real-time (and/or fast) simulations of future power grids with power electronics are discussed. Three of the emerging computing units are characterized based on these metrics and the process developed. This characterization will enable identification and comparison of emerging computing architectures that can perform real-time (and/or fast) simulation of future power grids.

Choi, Jongchan↗
DOE OSTI2023

Emerging Computing Architectures: Simulation of Power Electronics in Power Grids

As the penetration of power electronics increases in power grids, new computing architectures needed to be evaluated for the simulation of high-fidelity models of power electronics in power grids in operations. In this paper, emerging computing architectures such as quantum processing units are evaluated for the simulation of power electronics in power grids. A hybrid algorithm based on classical computing and quantum computing is developed and tested for different use cases of electromagnetic transient (EMT) simulation of power electronics (PE)-based systems and simple circuits. The algorithms needed to simulate power electronics in emerging computing architectures are discussed and thereafter, simulation results are shown.

Debnath, Suman↗
DOE OSTI2023

Mixed Monopole and Bipole MTdc Architecture

Multi-terminal dc systems (MTdc) are becoming popular at transmission level voltages. High-voltage dc (HVdc) based on voltage-source-converter (VSC) technology is employed in such systems. In this paper, a new MTdc architecture, which is suitable for future expansion and easy operation under overhaul and maintenance of the converter stations is proposed. Steady state and dc fault simulation studies are performed to prove the feasibility of the MTdc architecture. Technical advantages and challenges related to the new architecture are detailed.

Jaldanki, Sreenivasa↗
DOE OSTI2018

Designing Algorithms for the EMU Migrating-threads-based Architecture

The decades-old memory bottleneck problem for data-intensive applications is getting worse as the processor core counts continue to increase. Workloads with sparse memory access characteristics only achieve a fraction of a system’s total memory bandwidth. EMU architecture provides a radical approach to the issue by migrating the computational threads to the location where the data resides. The system enables access to a large PGAS-type memory for hundreds of nodes via a Cilk- based multi-threaded execution scheme.EMU architecture brings brand new challenges in application design and development. Data distribution and thread creation strategies play a crucial role in achieving optimal performance in the EMU platform. In this work, we identify several design considerations that need to be taken care of while developing applications for the new architecture and we evaluate their performance effects on the EMU-chick hardware. We also present a modified BFS algorithm for the EMU system and give experi- mental results for its execution on the platform.

Belviranli, Mehmet E.↗
DOE OSTI2021

Modeling Data Movement Performance on Heterogeneous Architectures

The cost of data movement on parallel systems varies greatly with machine architecture, job partition, and nearby jobs. Performance models that accurately capture the cost of data movement provide a tool for analysis, allowing for communication bottlenecks to be pinpointed. Modern heterogeneous architectures yield increased variance in data movement as there are a number of viable paths for inter-GPU communication. In this paper, we present performance models for the various paths of inter-node communication on modern heterogeneous architectures, including the trade-off between GPUDirect communication and copying to CPUs. Furthermore, we present a novel optimization for inter-node communication based on these models, utilizing all available CPU cores per node. Finally, we show associated performance improvements for MPI collective operations.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2024

Neuro-Spark: A Submicrosecond Spiking Neural Networks Architecture for In-Sensor Filtering

Neuro-Spark, which is a new neuromorphic architecture with a field-programmable gate array (FPGA) implementation for ultrafast spiking neural network (SNN) inference at the edge, facilitates smart-pixel in-sensor filtering for high-energy physics experiments at the Large Hadron Collider (LHC). Utilizing the evolutionary optimization for neuromorphic systems (EONS) training method, we generate compact SNN models with 91% signal efficiency, akin to convolutional neural networks but with half the parameters. However, deploying near the detector poses a challenge because the SNN must handle a sustained input data rate exceeding 1013 GB/s. To overcome this, we propose a novel hardware architecture that uses high-level synthesis to construct a tuned architecture for the EONS-trained SNN. In addition to the analysis and validation with an AMD Xilinx Artix-A7 FPGA, our solution consumes only ç24% of FPGA LUT and flipflops. We also introduce an innovative quantization method that reduces FPGA resource utilization by ç15% without compromising accuracy. Our FPGA implementation achieves computing latency of ç10 ns for smart-pixel application inference on an edge FPGA.

Miniskar, Narasinga Rao↗
DOE OSTI2025

Microgrid Building Block Architecture, and Subcomponents Modeling and Demonstration in Controller Hardware-in-the-Loop

The recently proposed Microgrid Building Blocks (MBB) are ready-to-use components to build microgrids quickly, cheaply, and modularly. This work presents and demonstrates in controller hardware-in-the-loop (CHIL) three key subcomponents of an MBB architecture: power converter topology, control scheme, and communication framework. The addressed architecture aims for systems interconnection such as microgrid to grid and microgrid to microgrid. This paper studies each subcomponent in detail and validates the efficacy of the architecture through CHIL results.

Adib, Aswad [ORNL] (ORCID:000000020997056X)↗
DOE OSTI2024

Comparative Study of Large Language Model Architectures on Frontier

Large language models (LLMs) have garnered significant attention in both the AI community and beyond. Among these, the Generative Pre-trained Transformer (GPT) has emerged as the dominant architecture, spawning numerous variants. However, these variants have undergone pre-training under diverse conditions, including variations in input data, data preprocessing, and training methodologies, resulting in a lack of controlled comparative studies. Here we meticulously examine two prominent open-sourced GPT architectures, GPT-NeoX and LLaMA, leveraging the computational power of Frontier, the world’s first Exascale supercomputer. Employing the same materials science text corpus and a comprehensive end-to-end pipeline, we conduct a comparative analysis of their training and downstream performance. Our efforts culminate in achieving state-of-the-art performance on a challenging materials science benchmark. Furthermore, we investigate the computation and energy efficiency, and propose a computationally efficient method for architecture design. To our knowledge, these pre-trained models represent the largest available for materials science. Our findings provide practical guidance for building LLMs on HPC platforms.

Yin, Junqi↗
DOE OSTI2025

High-Intensity UV Exposure for the Rapid Screening of Silicon Photovoltaic Architectures

Advanced Si photovoltaic architectures incorporate different materials and processing pathways that influence degradation modes. Ultraviolet-induced degradation (UVID) is an understudied degradation mode for advanced cell architectures and is of increasing concern to industry due to growing adoption of UV-transparent encapsulation and bifacial technologies. In order to adopt new and evolving technologies confidently, novel component materials and processing techniques must be evaluated and designed for long-term stability, in addition to the conventional design focus on efficiency. In this work, a study protocol framework is presented for the rapid screening of unencapsulated devices against UVID. Unencapsulated passivated emitter rear contact (PERC) and tunnel oxide passivated contact (TOPCon) devices were aged under different UV irradiance intensities and measured via conventional nondestructive electrical characterization methods to assess performance degradation. Based on the results, protocol efficacy and recommendations for further study are discussed. As a result, this work is part of a broader effort to develop rapid screening processes that cut across architectures and exposure conditions to aid module manufacturers in vetting new materials choices for long-term stability.

Accelerated exposure↗
DOE OSTI2023

Novel Cascaded Ring Oscillator Vernier based TDC Architecture with a Feedthrough Reference Oscillator

Time to digital converters (TDCs) are widely used in particle physics and medical imaging to determine the relative arrival time of photons and other particles. Vernier TDCs are one of the most attractive options due to their power consumption efficiency and their small footprint. We present our newly patented innovative architecture of cascaded-stage Vernier TDCs comprised of a feedthrough reference oscillator. This architecture lead to successive Vernier measurements that result in a lower number of cycles for the same dynamic range to resolution ratio (DRRR), leading to reduced conversion time and lower jitter. To validate this architecture, a test chip was designed in 0.18~μm TSMC technology, integrating four types of cascaded Vernier TDCs with an increasing number of stages. The performance of the chip was assessed using a modular test platform specifically designed for TDCs. For comparison purposes, all TDCs were tested with a LSB of 50~ps and a dynamic range of 20~ns. The experimental results demonstrate the highest gain in performance between 1 stage Vernier and 2 stage Vernier TDCs with the precision improved from 36~ps~rms to 21~ps~rms, the maximum number of turns from 110 to 25 counts and the dead time, from 266.4~ns to 76.5~ns, on average. Adding Vernier stages is only relevant for a higher DRRR. Therefore, the 3-stage and 4-stage Vernier TDCs also show performance gains, but improvements are limited.

Scarpellini, Robin↗
DOE OSTI2024

Developments for Novel Module Architecture for Lower CapEx and Improved Recyclability for c-Si PV Modules

Photovoltaic (PV) energy production is currently increasing at a significant rate. A novel module architecture has been demonstrated that has potential for reducing manufacturing cost while improving module reliability and recycling for c-Si PV which utilizes an edge-seal. Referred to as Edge Sealed Module (ESM), this architecture eliminates the vacuum lamination process and cross-linked encapsulants on the interior of the module. Functioning prototypes of c-Si have been fabricated for stress testing in collaboration with National Renewable Energy Laboratories (NREL). These modules are being tested and compared to traditionally manufactured modules. Based on preliminary results, this module architecture is a potentially viable solution for improving the manufacturing cost and recyclability of PV modules while enhancing module performance.

costs↗
DOE OSTI2021

Optimal Control of the Energy-Saving Hybrid Hydraulic-Electric Architecture (HHEA) for Off-Highway Mobile Machines

Most off-highway constructions and agriculture equipment use hydraulics, which has unmatched power density, for power transmission and throttling as a means for control. A novel hybrid hydraulic-electric architecture (HHEA) has recently been proposed to improve efficiency for high-power machines that would have been cost-prohibitive to electrify directly. HHEA uses a set of common pressure rails (CPRs) to transmit the majority of power hydraulically and small electric motor drives to modulate that power and to achieve precise control. This article proposes a computationally efficient Lagrange multiplier method (LMM) for computing the optimal sequence of pressure rail selections to minimize energy use. This is needed to evaluate HHEA's energy-saving potential and for iterative architecture design and sizing. An interesting complication is that the cost function is not fully defined until the candidate control sequence is fully specified. This issue is dealt with by decomposing the original problem into a set of sub-problems with additional constraints that can be solved efficiently. Computational effort can be further reduced if actuators are optimized individually instead of together. However, additional steps are required to prevent the constraint functions from becoming discontinuous with respect to the Lagrange multipliers, which is necessary for meeting the constraints. Lastly, a case study of a construction machine demonstrates the efficacy of the method and shows that the HHEA reduces energy consumption by 68%-73% compared to the baseline load-sensing architecture.

Lagrange multiplier↗