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At least 91 records · Page 5

Characterizing Defects Inside Hexagonal Boron Nitride Using Random Telegraph Signals in van der Waals 2D Transistors

Single-crystal hexagonal boron nitride (hBN) is used extensively in many two-dimensional electronic and quantum devices, where defects significantly impact performance. Therefore, characterizing and engineering hBN defects are crucial for advancing these technologies. Here, we examine the capture and emission dynamics of defects in hBN by utilizing low-frequency noise (LFN) spectroscopy in hBN-encapsulated and graphene-contacted MoS 2 field-effect transistors (FETs). The low disorder of this heterostructure allows the detection of random telegraph signals (RTS) in large device dimensions of 100 μm 2 at cryogenic temperatures. Analysis of gate bias- and temperature-dependent LFN data indicate that RTS originates from a single trap species within hBN. By performing multi-space density functional theory (MS-DFT) calculations on a gated defective hBN/MoS 2 heterostructure model, we assign substitutional carbon atoms in boron sites as the atomistic origin of RTS. This study demonstrates the utility of LFN spectroscopy combined with MS-DFT analysis on a low-disorder all-vdW FET as a powerful means for characterizing the atomistic defects in single-crystal hBN.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Low Ohmic contact resistance and high on/off ratio in transition metal dichalcogenides field-effect transistors via residue-free transfer

Beyond-silicon technology demands ultrahigh performance field-effect transistors. Transition metal dichalcogenides provide an ideal material platform, but the device performances such as the contact resistance, on/off ratio and mobility are often limited by the presence of interfacial residues caused by transfer procedures. Here, we show an ideal residue-free transfer approach using polypropylene carbonate with a negligible residue coverage of ~0.08% for monolayer MoS 2 at the centimetre scale. By incorporating a bismuth semimetal contact with an atomically clean monolayer MoS 2 field-effect transistor on hexagonal boron nitride substrate, we obtain an ultralow Ohmic contact resistance of ~78 Ω µm, approaching the quantum limit, and a record-high on/off ratio of ~10 11 at 15 K. Further, such an ultra-clean fabrication approach could be the ideal platform for high-performance electrical devices using large-area semiconducting transition metal dichalcogenides.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Fully Inkjet‐Printed, 2D Materials‐Based Field‐Effect Transistor for Water Sensing

Abstract Despite significant progress in solution‐processing of 2D materials, it remains challenging to reliably print high‐performance semiconducting channels that can be efficiently modulated in a field‐effect transistor (FET). Herein, electrochemically exfoliated MoS 2 nanosheets are inkjet‐printed into ultrathin semiconducting channels, resulting in high on/off current ratios up to 10 3 . The reported printing strategy is reliable and general for thin film channel fabrication even in the presence of the ubiquitous coffee‐ring effect. Statistical modeling analysis on the printed pattern profiles suggests that a spaced parallel printing approach can overcome the coffee‐ring effect during inkjet printing, resulting in uniform 2D flake percolation networks. The uniformity of the printed features allows the MoS 2 channel to be hundreds of micrometers long, which easily accommodates the typical inkjet printing resolution of tens of micrometers, thereby enabling fully printed FETs. As a proof of concept, FET water sensors are demonstrated using printed MoS 2 as the FET channel, and printed graphene as the electrodes and the sensing area. After functionalization of the sensing area, the printed water sensor shows a selective response to Pb 2+ in water down to 2 ppb. This work paves the way for additive nanomanufacturing of FET‐based sensors and related devices using 2D nanomaterials.

36 MATERIALS SCIENCE↗

High-performance 2D electronic devices enabled by strong and tough two-dimensional polymer with ultra-low dielectric constant

As the feature size of microelectronic circuits is scaling down to nanometer order, the increasing interconnect crosstalk, resistance-capacitance (RC) delay and power consumption can limit the chip performance and reliability. To address these challenges, new low-k dielectric (k < 2) materials need to be developed to replace current silicon dioxide (k = 3.9) or SiCOH, etc. However, existing low-k dielectric materials, such as organosilicate glass or polymeric dielectrics, suffer from poor thermal and mechanical properties. Two-dimensional polymers (2DPs) are considered promising low-k dielectric materials because of their good thermal and mechanical properties, high porosity and designability. Here, we report a chemical-vapor-deposition (CVD) method for growing fluoride rich 2DP-F films on arbitrary substrates. We show that the grown 2DP-F thin films exhibit ultra-low dielectric constant (in plane k = 1.85 and out-of-plane k = 1.82) and remarkable mechanical properties (Young’s modulus > 15 GPa). We also demonstrated the improved performance of monolayer MoS 2 field-effect-transistors when utilizing 2DP-F thin films as dielectric substrates.

36 MATERIALS SCIENCE↗

Automated tester for MOS devices

Automated system rapidly diagnoses MOS integrated circuits. Its programed electronics investigate transistor and cell characteristics to compile data needed for screening. Program can be changed rapidly to alter test procedures, test duration, and precision.

Cockrum, R. H.↗

Lithium-ion electrolytic substrates for sub-1V high-performance transition metal dichalcogenide transistors and amplifiers

Electrostatic gating of two-dimensional (2D) materials with ionic liquids (ILs), leading to the accumulation of high surface charge carrier densities, has been often exploited in 2D devices. However, the intrinsic liquid nature of ILs, their sensitivity to humidity, and the stress induced in frozen liquids inhibit ILs from constituting an ideal platform for electrostatic gating. Here we report a lithium-ion solid electrolyte substrate, demonstrating its application in high-performance back-gated n-type MoS 2 and p-type WSe 2 transistors with sub-threshold values approaching the ideal limit of 60 mV/dec and complementary inverter amplifier gain of 34, the highest among comparable amplifiers. Remarkably, these outstanding values were obtained under 1 V power supply. Microscopic studies of the transistor channel using microwave impedance microscopy reveal a homogeneous channel formation, indicative of a smooth interface between the TMD and underlying electrolytic substrate. These results establish lithium-ion substrates as a promising alternative to ILs for advanced thin-film devices.

42 ENGINEERING↗

G4-FETs as Universal and Programmable Logic Gates

An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.

Johnson, Travis↗

Raman Laser-Induced Structural Modification in CVD-Grown Monolayer MoS 2 for Multi-Purposed Nanofabrication

Molybdenum disulfide (MoS 2 ) has been extensively explored to be utilized as an electronic material in a variety of device applications. In particular, the tunability of MoS 2 enhances its electrical properties making it an intriguing candidate for field-effect transistors (FETs), while also extending beyond electrical properties to structural phase engineering. Laser-induced modifications, particularly with Raman lasers, offer a straightforward method to modulate materials via thermal processes with precise patterning control and energy-level flexibility. However, most studies on the modification of MoS 2 have focused on multilayered structures or have been conducted under low-power laser conditions, leaving the feasibility of structural modifications in monolayer MoS 2 elusive. In this study, we fundamentally elucidated the effects of high-power Raman laser irradiation on the surface of chemical vapor deposition (CVD)-grown monolayer MoS 2 under ambient conditions and uncovered the underlying mechanisms of laser-induced modifications by applying intense photon energy with highly interactive reactions. Our results revealed both etching and deposition phenomena in two discernible regions, and it can be demonstrated by intensity regimes based on the spatial distribution of laser irradiance within the laser-irradiated spot. Furthermore, phase transition was found to be inhibited due to the promoted oxidation and the deposition of hydrogenated amorphous carbon (a-C:H), and p-type doping was observed, likely occurring in the region beneath the a-C:H deposition as substitutional doping on the 2H phase of MoS 2 . To compare the thermal effects, MoS 2 modifications were further analyzed using simplified heat transfer estimations. In conclusion, these findings deepen our understanding of how Raman laser irradiation modifies MoS 2 under ambient conditions, providing guidelines for optimizing its modification processes.

36 MATERIALS SCIENCE↗

Correlation Between Corrugation-Induced Flexoelectric Polarization and Conductivity of Low-Dimensional Transition Metal Dichalcogenides

The tunability of polar and semiconducting properties of low-dimensional transition metal dichalcogenides (TMDs) have propelled them to the forefront of fundamental and applied physical research. These materials can vary their electrophysical properties from nonpolar to ferroelectric, and from direct-band semiconducting to metallic. In addition to classical controlling factors, such as field effect, composition, and doping, new degrees of freedom emerge in TMDs due to the curvature-induced electron redistribution and the associated changes in electronic properties. Here we theoretically explore the elastic and electric fields, flexoelectric polarization and free charge density for a TMD nanoflake placed on a rough substrate with a sinusoidal corrugation profile. Finite element modelling results for different flake thickness and corrugation depth yield insights into the flexoelectric nature of the out-of-plane electric polarization and establish the unambiguous correlation between the polarization and static conductivity modulation. The modulation is caused by the coupling between the deformation potential and inhomogeneous elastic strains, which evolve in the TMD nanoflake due to the adhesion between the flake surface and corrugated substrate. We reveal a pronounced maximum in the thickness dependences of the electron and hole conductivity of MoS 2 and MoTe 2 nanoflakes placed on a corrugated substrate, which opens the way for the optimization of their geometry towards significant improvement in their polar and electronic properties, necessary for advanced applications in nanoelectronics and memory devices. Specifically, the obtained results can be useful for the development of nanoscale straintronic devices based on the bended MoS 2 , MoTe 2 , and MoSTe nanoflakes, such as diodes and bipolar transistors with a bending-controllable sharpness of p-n junctions.

42 ENGINEERING↗

Hardening electronic devices against very high total dose radiation environments

The possibilities and limitations of hardening silicon semiconductor devices to the high neutron and gamma radiation levels and greater than 10 to the eighth power rads required for the NERVA nuclear engine development are discussed. A comparison is made of the high dose neutron and gamma hardening potential of bipolar, metal insulator semiconductors and junction field effect transistors. Experimental data is presented on device degradation for the high neutron and gamma doses. Previous data and comparisons indicate that the JFET is much more immune to the combined neutron displacement and gamma ionizing effects than other transistor types. Experimental evidence is also presented which indicates that p channel MOS devices may be able to meet the requirements.

Buchanan, B.↗

A complementary DMOS-VMOS IC structure

A new complementary MOS structure has been fabricated consisting of a p-channel DMOS transistor and an n-channel double-diffused VMOS transistor. The transconductance of each transistor was between 0.85-0.98 of the theoretical transconductance. The threshold voltages have been adjusted by either ion implantation or by adjusting the diffusion profiles. The inverter operation is similar to that of standard CMOS.

Jhabvala, M.↗

Experimental investigation of a double-diffused MOS structure

Self-aligned polysilicon gate technology was applied to double-diffused MOS (DMOS) construction in a manner that retains processing simplicity and effectively eliminates parasitic overlap capacitance because of the self-aligning feature. Depletion mode load devices with the same dimensions as the DMOS transistors were integrated. The ratioless feature results in smaller dimension load devices, allowing for higher density integration with no increase in the processing complexity of standard MOS technology. A number of inverters connected as ring oscillators were used as a vehicle to test the performance and to verify the anticipated benefits. The propagation time-power dissipation product and process related parameters were measured and evaluated. This report includes (1) details of the process; (2) test data and design details for the DMOS transistor, the load device, the inverter, the ring oscillator, and a shift register with a novel tapered geometry for the output stages; and (3) an analytical treatment of the effect of the distributed silicon gate resistance and capacitance on the speed of DMOS transistors.

Lin, H. C.↗

Standard Transistor Arrays

Standard Transistor Array (STAR) design system is semicustom approach to generating random-logic integrated MOS digital circuits. Primary program in STAR system is CAPSTAR, STAR Cell Arrangement Program. CAPSTAR is augmented by automatic routining program, Display program and library of logic cells.

Cox, G. W.↗

Modeling of Gate Bias Modulation in Carbon Nanotube Field-Effect-Transistors

The threshold voltages of a carbon nanotube (CNT) field-effect transistor (FET) are derived and compared with those of the metal oxide-semiconductor (MOS) FETs. The CNT channel is so thin that there is no voltage drop perpendicular to the gate electrode plane, which is the CNT diameter direction, and this makes the CNTFET characteristics quite different from those in MOSFETs. The relation between the voltage and the electrochemical potentials, and the mass action law for electrons and holes are examined in the context of CNTs, and it is shown that the familiar relations are still valid because of the macroscopic number of states available in the CNTs. This is in sharp contrast to the cases of quantum dots. Using these relations, we derive an inversion threshold voltage V(sub Ti) and an accumulation threshold voltage V(sub Ta) as a function of the Fermi level E(sub F) in the channel, where E(sub F) is a measure of channel doping. V(sub Ti) of the CNTFETs has a much stronger dependence than that of MOSFETs, while V(sub Ta)s of both CNTFETs and MOSFETs depend quite weakly on E(sub F) with the same functional form. This means the transition from normally-off mode to normally-on mode is much sharper in CNTFETs as the doping increases, and this property has to be taken into account in circuit design.

Yamada, Toshishige↗