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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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This paper summarizes and reports a radiation hardened spacecraft high temperature, high reliability Sensor/Circut Integrated Packaging Technology.
The results of a study carried out in order to manufacture and verify the quality of chip-on-board (COB) packaging technology are presented. The COB, designed for space applications, was tested under environmental stresses, temperature cycling, and temperature-humidity-bias. Both robustness in space applications and in environmental protection on the ground-complete reliability without hermeticity were searched for. The epoxy-parylene combinations proved to be superior to other materials tested.
In relation to the Rosetta surface science package, the benefits of the application of advanced microelectronics packaging technologies and other output from the Mars environmental survey (MESUR) integrated microelectronics study are reported on. The surface science package will be designed to operate for tens of hours. Its limited mass and power consumption make necessary a highly integrated design with all the instruments and subunits operated from a centralized control and information management subsystem.
The intent of this presentation is to give a brief look into the future of electronic packaging for microspacecraft applications. Advancements in electronic packaging technology areas have developed to the point where a system engineer's visions, concepts, and requirements for a microspacecraft can now be a reality. These new developments are ideal candidates for microspacecraft applications. These technologies are capable of bringing about major changes in how we design future spacecraft while taking advantage of the benefits due to size, weight, power, performance, reliability , and cost. This presentation will also cover some advantages and limitations of surface mount technology (SMT), multichip modules (MCM), and wafer scale integration (WSI), and what is needed to implement these technologies into microspacecraft.
This paper presents the results of NASA’s COLDTECH development entitled “Cold Survivable Distributed Motor Controller (CSDMC)”. This work addresses the need to lower the mass, power and volume of the motor control electronics and its associated cabling. Landed payload mass of ocean world missions typically requires a spacecraft launch mass of 7-10x the landed mass due to the required propellant to get the payload to the surface. Reduction of landed mass leads to cheaper, more frequent missions and/or increased science return. This work addresses this need by developing a distributed electronics architecture, which places control and power electronics near or at actuators and instruments. The outcome of this effort will result in a 10X reduction in harness mass, enabling a significant increase in science payload which then enables more capable sample acquisition, delivery and analysis systems on these missions. Placing the control and power conversion electronics at or near the actuators or instruments is the cornerstone of our distributed architecture. To do this, we developed the technology necessary to distribute the electronics and place them on a shared interface and power bus. This enables a significant reduction in cable mass along with its associated complexity. This allows spacecraft designers to take advantage of volume at the extremities that would normally not be utilized. In this paper we discuss the technologies and system design to achieve these goals in support of ocean world missions. These technologies include the development of our motor control modules, a point of load regulator and isolated converter modules along with the packaging technology necessary to allow our electronics to survive the extreme temperatures.
A review of low cost large solid rocket motors developed at the Lewis Research Center is given. An estimate is made of the total cost reduction obtainable by incorporating this new technology package into the rocket motor design. The propellant, case material, insulation, nozzle ablatives, and thrust vector control are discussed. The effect of the new technology on motor cost is calculated for a typical expandable 260-in. booster application. Included in the cost analysis is the influence of motor performance variations due to specific impulse and weight changes. It is found for this application that motor costs may be reduced by up to 30% and that the economic attractiveness of future large solid rocket motors will be improved when the new technology is implemented.
Abstract. Changes in modern integrated circuit (IC) technologies have modified the way we approach and conduct radiation tolerance and testing of electronics. These changes include scaling of geometries, new materials, new packaging technologies, and overall speed and device complexity challenges. In this short course section, we will identify and discuss these issues as they impact radiation testing, modeling, and effects mitigation of modern integrated circuits. The focus will be on CMOS-based technologies, however, other high performance technologies will be discussed where appropriate. The effects of concern will be: Single-Event Effects (SEE) and steady state total ionizing dose (TID) IC response. However, due to the growing use of opto-electronics in space systems issues concerning displacement damage testing will also be considered. This short course section is not intended to provide detailed "how-to-test" information, but simply provide a snapshot of current challenges and some of the approaches being considered.
Efforts in integrated circuit (IC) packaging technologies have recently been focused on management of increasing heat density associated with high frequency and high density circuit designs. While current flip-chip package designs can accommodate relatively high amounts of heat density, new materials need to be developed to manage thermal effects of next-generation integrated circuits. Multiwall carbon nanotubes (MWNT) have been shown to significantly enhance thermal conduction in the axial direction and thus can be considered to be a candidate for future thermal interface materials by facilitating efficient thermal transport. This work focuses on fabrication and characterization of a robust MWNT-copper composite material as an element in IC package designs. We show that using vertically aligned MWNT arrays reduces interfacial thermal resistance by increasing conduction surface area, and furthermore, the embedded copper acts as a lateral heat spreader to efficiently disperse heat, a necessary function for packaging materials. In addition, we demonstrate reusability of the material, and the absence of residue on the contacting material, both novel features of the MWNT-copper composite that are not found in most state-of-the-art thermal interface materials. Electrochemical methods such as metal deposition and etch are discussed for the creation of the MWNT-Cu composite, detailing issues and observations with using such methods. We show that precise engineering of the composite surface affects the ability of this material to act as an efficient thermal interface material. A thermal contact resistance measurement has been designed to obtain a value of thermal contact resistance for a variety of different thermal contact materials.
Different aspects of advanced surface mount package technology have been investigated for aerospace applications. Three key areas included the assembly reliability of conventional Surface Mount, Ball Grid Arrays (BGAs), and Chip Scale Packages.
Different aspects of advanced surface mount package technology have been investigated for aerospace applications. Three key areas included the assembly reliability of conventional Surface Mount, Ball Grid Arrays (BGAs), and Chip Scale Packages.
Diffenent aspects of advanced surface mount package technology have been investigated for aerospace applications. Three key areas included understanding assembly reliability behavior of conventional surface Mount, Ball Grid Arrays (BGAs), and Chip Scale Packages.
Package manufacturers are now offering commercial-off-the-shelf column grid array (COTS CGA) packaging technologies in high-reliability versions. Understanding the process and quality assurance (QA) indicators for reliability are important for low-risk insertion of these advanced electronics packages. The previous reports, released in January of 2012 and January of 2013, presented package test data, assembly information, and reliability evaluation by thermal cycling for CGA packages with 1752, 1517, 1509, and 1272 inputs/outputs (I/Os) and 1-mm pitch. It presented the thermal cycling (-55C either 100C or 125C) test results for up to 200 cycles. This report presents up to 500 thermal cycles with quality assurance and failure analysis evaluation represented by optical photomicrographs, 2D real time X-ray images, dye-and-pry photomicrographs, and optical/scanning electron Microscopy (SEM) cross-sectional images. The report also presents assembly challenge using reflowing by either vapor phase or rework station of CGA and land grid array (LGA) versions of three high I/O packages both ceramic and plastic configuration. A new test vehicle was designed having high density interconnect (HDI) printed circuit board (PCB) with microvia-in-pad to accommodate both LGA packages as well as a large number of fine pitch ball grid arrays (BGAs). The LGAs either were assembled onto HDI PCB as an LGA or were solder paste print and reflow first to form solder dome on pads before assembly. Both plastic BGAs with 1156 I/O and ceramic LGAs were assembled. It also presented the X-ray inspection results as well as failures due to 200 thermal cycles. Lessons learned on assembly of ceramic LGAs are also presented.
This paper is the last of a series of three by the Mass-Driver Group of the 1977 Ames Summer Study. It develops the engineering principles required to implement the basic mass-driver design defined in paper I and as presented previously in the literature. Optimum component mass trade-offs are derived from a set of four input parameters, and the program used to design a lunar launcher. The mass optimization procedure is then incorporated into a more comprehensive mission optimization program called OPT-4, which evaluates an optimized mass-driver reaction engine and its performance in a range of specified missions. Finally, this paper discusses, to the extent that time permitted, certain peripheral problems: heating effects in buckets due to magnetic field ripple; an approximate derivation of guide force profiles; the mechanics of inserting and releasing payloads; the reaction mass orbits; and a proposed research and development plan for implementing mass drivers. This paper also considers further optimization that depends on advances in component technology beyond the present state. It is concluded that significant advantage can be gained in the case of small reaction engines with high emission velocity by developing lightweight packaging technology for silicon-controlled rectifiers (SCR's).
Micro-electro-mechanical systems (MEMS) provide an emerging technology that has the potential for revolutionizing the way space systems are designed, assembled, and tested. The high launch costs of current space systems are a major determining factor in the amount of functionality that can be integrated in a typical space system. MEMS devices have the ability to increase the functionality of selected satellite subsystems while simultaneously decreasing spacecraft weight. The Air Force Phillips Laboratory (PL) is supporting the development of a variety of MEMS related technologies as one of several methods to reduce the weight of space systems and increase their performance. MEMS research is a natural extension of PL research objectives in micro-electronics and advanced packaging. Examples of applications that are under research include on-chip micro-coolers, micro-gyroscopes, vibration sensors, and three-dimensional packaging technologies to integrate electronics with MEMS devices. The first on-orbit space flight demonstration of these and other technologies is scheduled for next year.
Although NASA has an adequate food system for current missions, research is required to accommodate new requirements for future NASA exploration missions. The Inadequate Food System risk reflects the need to develop requirements and technologies that will enable NASA to provide the crew with a safe, nutritious and acceptable food system while effectively balancing appropriate resources such as mass, volume, and crew time in exploratory missions. As we go deeper into space or spend more time on the International Space Station (ISS), there will be requirements for packaged food to be stored for 3 5 years. New food packaging technologies are needed that have adequate oxygen and water barrier properties to maintain the foods' quality over this extended shelf life. NASA has been unsuccessful in identify packaging materials that meet the necessary requirements when using several traditional routes including literature reviews, workshops, and internal shelf life studies on foods packaged in various packaging materials. Small Business Innovative Research grants were used for accelerating food packaging materials research with limited success. In order to accelerate the process, a theoretical challenge was submitted to InnoCentive resulting in a partial award. A similar food packaging challenge was submitted to Yet2.com and several potential commercial packaging material suppliers were identified that, at least partially, met the requirements. Comparisons and results of these challenges will be discussed.
With the development of silicon carbide (SiC) sensors and electronic devices for operation at 500°C, compatible packaging technologies are needed for long term high temperature test and deployment of these sensors and electronic devices. 96% Al2O3ceramic is an excellent electrically insulating material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. This paper presents a packaging system for low power integrated circuits including a prototype 8-I/O chip-level package and printed circuit board (PCB) based on 96% Al2O3ceramic substrates and Au thick-film metallization for 500°C applications. The details related to designs of packages and PCBs, packaging materials, and specific packaging step recipes including wire -bonding and die-attach, are presented. Some test results of this prototype packaging approach applied to SiC integrated circuits at 500°C are reviewed.
Over the past five decades, NASA Glenn Research Center had been advancing the development of single crystal silicon carbide growth, sensors and electronics device technologies, culminating in the recent demonstration of Micro-Electro-Mechanical Systems scale batch fabricated pressure sensors operating at 800 °C and integrated circuit electronics with demonstrated durability of over 1000 hours at 500 °C. As a result of the progress made in demonstrating the high temperature capability of the technology, insertion into actual operational environments, such as in jet engines and planet Venus, are in progress. The high temperature, near inert surface chemistry, and radiation hardness attributes of SiC, coupled with the relative maturation of the device batch microfabrication, contact metallization, and packaging technologies, make the material a prime candidate for use as part of future advanced nuclear reactor instrumentation and control strategy. Hence the current research efforts at NASA Glenn are aimed toward harnessing these attributes in developing SiC sensors and electronics for nuclear reactor applications, potentially for future Lunar/Martian nuclear power and the emerging terrestrial micro nuclear power plants.
The LTP (LISA Technology Package) is the core part of the Laser Interferometer Space Antenna (LISA) Pathfinder mission. The main goal of the mission is to study the sources of any disturbances that perturb the motion of the freely-falling test masses from their geodesic trajectories as well as 10 test various technologies needed for LISA. The LTP experiment is designed as a sequence of experimental runs in which the performance of the instrument is studied and characterized under different operating conditions. In order to best optimize subsequent experimental runs, each run must be promptly analysed to ensure that the following ones make best use of the available knowledge of the instrument ' In order to do this, all analyses must be designed and tested in advance of the mission and have sufficient built-in flexibility to account for unexpected results or behaviour. To support this activity, a robust and flexible data analysis software package is also required. This poster presents two of the main components that make up the data analysis effort: the data analysis software and the mock-data challenges used to validate analysis procedures and experiment designs.