Complementary MOS - Bipolar transistor structure
Bipolar n-p-n transistors fabrication to increase driving capabilities of complementary MOS transistors while retaining low power dissipation
Ho, J. C.↗
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Performance potential of high-frequency heterojunction transistors
GaAs-Ge heterojunction transistors with microwave planar geometry, calculating performance for comparison with Ge homojunction transistor
Feucht, D. L.↗
Improved circuit avoids premature power transistor failure
Reactor inserted in the base-drive circuit of each power transistor delays the turn-on of one transistor until the other has turned off.
Mclyman, W. T.↗
Development of ion implanted gallium arsenide transistors
Techniques were developed for creating bipolar microwave transistors in GaAs by ion implantation doping. The electrical properties of doped layers produced by the implantation of the light ions Be, Mg, and S were studied. Be, Mg, and S are suitable for forming the relatively deep base-collector junction at low ion energies. The electrical characteristics of ion-implanted diodes of both the mesa and planar types were determined. Some n-p-n planar transistor structures were fabricated by implantation of Mg to form the base regions and Si to form the emitters. These devices were found to have reasonably good base-collector and emitter-base junctions, but the current gain beta was small. The low was attributable to radiative recombination in the base region, which was extremely wide.
Hunsperger, R.↗
Silicon switching transistor with high power and low saturation voltage
Assembly of two individually encapsulated silicon-chip transistors produces silicon power-transistor that has low electrical resistance and low thermal impedance. Electrical resistance and thermal impedance are low because of short lead lengths, and external contact surfaces are plated to reduce resistance at interfaces.
Stonebraker, E.↗
Development of a ruggedized 20-watt, 2.3- gigahertz transistor
This program was to develop a ruggedized transistor capable of meeting the following CW objectives at 2.3 gigahertz: a power output of 20 watts, a power gain of 6 db, and an efficiency of 40 percent. Devices developed produced the following CW performance at 2.3 gigahertz: a power output of 23 watts, a power gain of 7.7 db, and an efficiently of 40.0 percent. This performance was achieved with an eight-cell TA8407 transistor design having the following modifications: a thin pellet, high-frequency diffusion, high-level emitter ballasting, an optimized emitter-bonding configuration for uniform power sharing, and a package that provides for some internal matching through the use of distributed line techniques.
Source record↗
Optimal regime and conditioning time of transistors for equipment with increased reliability
It is shown that an economically justified choice of regime and conditioning time for transistors for equipment of increased reliability is impossible without analyzing the stabilization time of the transistor parameters. The optimal regime and conditioning time are well founded. A method is presented for evaluating the optimal conditioning time by technical economic indexes.
Breslavets, A. V.↗
Analysis and modeling of a family of two-transistor parallel inverters
A family of five static dc-to-square-wave inverters, each employing a square-loop magnetic core in conjunction with two switching transistors, is analyzed using piecewise-linear models for the nonlinear characteristics of the transistors, diodes, and saturable-core devices. Four of the inverters are analyzed in detail for the first time. These analyses show that, by proper choice of a frame of reference, each of the five quite differently appearing inverter circuits can be described by a common equivalent circuit. This equivalent circuit consists of a five-segment nonlinear resistor, a nonlinear saturable reactor, and a linear capacitor. Thus, by proper interpretation and identification of the parameters in the different circuits, the results of a detailed solution for one of the inverter circuits provide similar information and insight into the local and global behavior of each inverter in the family.
Lee, F. C. Y.↗
Pulse battery charger employing 1000 ampere transistor switches
A pulse charger which uses water-cooled 1000-amp transistor switches has been developed to determine empirically the best methods of rapidly charging large cells in the one- to two-volt range. The pulse charger is capable of delivering a positive current from 0 to 1000 amps and extracting a negative current from 0 to 1000 amps. The charger can supply a 1000-amp DC charge or can switch 1000 amps at a rate of 1000 Hz. Special attention is given to problems associated with rapid switching of high currents through use of transistors.
Steigerwald, R. L.↗
Transistor package for high pressure applications
TO63 transistor package can operate in hydraulic oil ar pressures of 200 psi or greater without leakage failure if it is reinforced by alumina disk brazed to cap and terminals. This inexpensive modification has been used successfully on power transistors in hydraulic circulating-pump assemblies for Space Shuttle orbiter and should be effective in other pressurized environments, such as in oil exploration equipment.
Zantos, P. J.↗
CADAT field-effect-transistor simulator
CADAT field-effect transistor simulator (FETSIM) analyzes dc and transient behavior of metal-oxide-semiconductor (MOS) circuits. Both N-MOS and P-MOS transistor configurations in either bulk of silicon-on-sapphire (SOS) technology and almost any combination of R/C elements are analyzed.
Source record↗
Shaping Transistor Leads for Better Solder Joints
Special lead-forming tool puts step in leads of microwave power transistors without damaging braze joints that fasten leads to package. Stepped leads are soldered to circuit boards more reliably than straight leads, and stress on brazes is relieved. Lead-forming hand-tool has two parts: a forming die and an actuator. Spring-loaded saddle is adjusted so that when transistor package is placed on it, leads rest on forming rails.
Mandel, H.↗
Standard Transistor Array (STAR). Volume 1: Placement technique
A large scale integration (LSI) technology, the standard transistor array uses a prefabricated understructure of transistors and a comprehensive library of digital logic cells to allow efficient fabrication of semicustom digital LSI circuits. The cell placement technique for this technology involves formation of a one dimensional cell layout and "folding" of the one dimensional placement onto the chip. It was found that, by use of various folding methods, high quality chip layouts can be achieved. Methods developed to measure of the "goodness" of the generated placements include efficient means for estimating channel usage requirements and for via counting. The placement and rating techniques were incorporated into a placement program (CAPSTAR). By means of repetitive use of the folding methods and simple placement improvement strategies, this program provides near optimum placements in a reasonable amount of time. The program was tested on several typical LSI circuits to provide performance comparisons both with respect to input parameters and with respect to the performance of other placement techniques. The results of this testing indicate that near optimum placements can be achieved by use of the procedures incurring severe time penalties.
Cox, G. W.↗
A 10kW series resonant converter design, transistor characterization, and base-drive optimization
Transistors are characterized for use as switches in resonant circuit applications. A base drive circuit to provide the optimal base drive to these transistors under resonant circuit conditions is developed and then used in the design, fabrication and testing of a breadboard, spaceborne type 10 kW series resonant converter.
Robson, R.↗
High Power Switching Transistor
Improved switching transistors handle 400-A peak currents and up to 1,200 V. Using large diameter silicon wafers with twice effective area as D60T, form basis for D7 family of power switching transistors. Package includes npn wafer, emitter preform, and base-contact insert. Applications are: 25to 50-kilowatt high-frequency dc/dc inverters, VSCF converters, and motor controllers for electrical vehicles.
Hower, P. L.↗
Measuring Tension in Transistor Suspensions
Vibration analyis is nondestructive and noninvasive. Transistor isolated from heat (or cold) of surroundings by filament suspension. Filaments made of polyester are (0.005 in) 0.127 mm in diameter. Transistor lead wires are wrapped around certain filaments. Applicable for testing filament mounts too delicate for testing by tension probes.
Hubbard, W. P.↗
Solder Bonding for Power Transistors
Indium solder boosts power rating and facilitates circuit changes. Efficient heat conduction from power transistor to heat sink provided by layer of indium solder. Low melting point of indium solder (141 degrees C) allows power transistor to be removed, if circuit must be reworked, without disturbing other components mounted with ordinary solder that melts at 181 degrees C. Solder allows devices operated at higher power levels than does conventional attachment by screws.
Snytsheuvel, H. A.↗
Controlling Transistor Temperature During Burn-In
Boiling refrigerant provides simple temperature control for newly manufactured power transistors. Heat-transfer liquid is Fluorinert FC-77 (or equivalent). Liquid boils at 100 degrees C, which is specified temperature at which transistor cases should be maintained during burn-in with this technique.
Scott, B. C.↗