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This paper presents data that has been generated within NASA, especially the Marshall Space Flight Center, concerning several failure mechanisms that have occurred with microelectronic packages. The types of packages that will be discussed are primarily flat packs with 14-24 exit leads that are composed of Kovar electro-deposited nickel and finally gold plated.
Technology for interconnecting monolithic integrated circuit chips with other components is investigated. The advantages and disadvantages of the current flip-chip approach as compared to other interconnection methods are outlined. A fluxless solder-bump contact technology is evaluated. Multiple solder-bump contacts were formed on silicon integrated circuit chips. The solder-bumps, comprised of a rigid nickel under layer and a compliant solder overlayer, were electroformed onto gold device pads with the aid of thick dry film photomasks. Different solder alloys and the use of conductive epoxy for bonding were explored. Fluxless solder-bump bond quality and reliability were evaluated by measuring the effects of centrifuge, thermal cycling, and high temperature storage on bond visual characteristics, bond electrical continuity, and bond shear tests. The applicability and suitability of this technology for hybrid microelectronic packaging is discussed.
In this paper we provide a snapshot of the commericial industry trends and how they may impact electronics in the aerospace environment. Impacts will be felt in the areas of: reliability, assembly methods, cost drivers, supply chain selection and alternate materials selection.
Modern microelectronics life-cycle and supply chain ecosystem bring multiple untrusted entities, which can compromise their integrity. A major integrity issue of microelectronics stems from piracy of intellectual properties (IP) and counterfeiting, which causes significant revenue loss to the semiconductor manufacturers. Further, these components often lead to compromised functionality, reliability, security, and safety of an electronic system. This paper presents secure information transmission and probing methods for verifying the integrity of digital integrated circuit (ICs) based on their electromagnetic (EM) near-field emissions and thereby protecting systems against counterfeit components. The proposed method has been tested on both high-level instructions executed by microprocessors or Systems-on-Chip (serving as examples of software), and also logic circuits within FPGA fabrics and ASICs (serving as examples of hardware). The authentication information required by each digital system is generated using a pseudo-random number generator circuit and securely transmitted via near-field magnetic emissions. The authorized party can probe these emissions using a near-field probe, process the acquired signals to improve the signal-to-noise ratio (SNR), and then recover the secure information through matched filtering. Experimental results from commercial SoCs are used to demonstrate the proposed technique. Methods for reducing EM interference during integrity verification of both FPGAs and ASICs are also described.
5G is a breakthrough technology to enable a fully mobile and connected society, and a 5G-enabled digital continuum will be one of the critical foundations for clean energy economy and grid modernization. The clean energy transformation not only requires innovative manufacturing, algorithm, application, and cross-domain co-simulation, but also a systematic evaluation and comprehensive support on the microelectronic and architectural computing customization to enable and maximize the high renewable penetration in the future power grid. The co-design of decarbonized grid, reliable yet efficient communication, and affordable yet ubiquitous computing will unlock the potential of almost any available tools for the undergoing clean energy transformation. 5G is also an opportunity to rethink the paradigm of infrastructure planning, as computing will be one of the core services for society alongside electricity and communication services.
As the feature size of microelectronic circuits is scaling down to nanometer order, the increasing interconnect crosstalk, resistance-capacitance (RC) delay and power consumption can limit the chip performance and reliability. To address these challenges, new low-k dielectric (k < 2) materials need to be developed to replace current silicon dioxide (k = 3.9) or SiCOH, etc. However, existing low-k dielectric materials, such as organosilicate glass or polymeric dielectrics, suffer from poor thermal and mechanical properties. Two-dimensional polymers (2DPs) are considered promising low-k dielectric materials because of their good thermal and mechanical properties, high porosity and designability. Here, we report a chemical-vapor-deposition (CVD) method for growing fluoride rich 2DP-F films on arbitrary substrates. We show that the grown 2DP-F thin films exhibit ultra-low dielectric constant (in plane k = 1.85 and out-of-plane k = 1.82) and remarkable mechanical properties (Young’s modulus > 15 GPa). We also demonstrated the improved performance of monolayer MoS 2 field-effect-transistors when utilizing 2DP-F thin films as dielectric substrates.
Ferroelectric hafnium oxides are poised to impact a wide range of microelectronic applications owing to their superior thickness scaling of ferroelectric stability and compatibility with mainstream semiconductors and fabrication processes. For broad-scale impact, long-term performance and reliability of devices using hafnia will require knowledge of the phases present and how they vary with time and use. In this Perspective article, the importance of phases present on device performance is discussed, including the extent to which specific classes of devices can tolerate phase impurities. Following, the factors and mechanisms that are known to influence phase stability, including substituents, crystallite size, oxygen point defects, electrode chemistry, biaxial stress, and electrode capping layers, are highlighted. Herein, discussions will focus on the importance of considering both neutral and charged oxygen vacancies as stabilizing agents, the limited biaxial strain imparted to a hafnia layer by adjacent electrodes, and the strong correlation of biaxial stress with resulting polarization response. Areas needing additional research, such as the necessity for a more quantitative means to distinguish the metastable tetragonal and orthorhombic phases, quantification of oxygen vacancies, and calculation of band structures, including defect energy levels for pure hafnia and stabilized with substituents, are emphasized.
Radiation Effects Group investigates the effects of space radiation on present and future microelectronic and optoelectronic technologies, evaluate the risk of using them in specific space missions, and recommend component and design techniques for JPL and NASA programs to reduce reliability risk from space radiation.
Power Spectrum Analysis (PSA) is a Sandia-developed, non-intrusive, electrical technique that captures distinct frequency-domain signatures of microelectronics devices using an innovative, unconventional biasing scheme (off-normal biasing). PSA can identify subtle differences in devices and is applicable in various areas such as device screening, counterfeit identification, reliability assurance, and trust authentication. From October 2020 to April 2021, Sandia worked with entrepreneurs from a new start-up company, Chiplytics, to commercialize PSA technology through NNSA-sponsored FedTech Program. In September 2021, Sandia received funding through Covid-19 Technical Assistance Program (CTAP) to provide technical assistance to Chiplytics for commercialization. Under the CTAP Statement of Work, Sandia was tasked with providing technical assistance to Chiplytics in PSA pilot testing for Naval Surface Warfare Center (NSWC) at Crane and other pilot participants. Sandia was also tasked with assisting Chiplytics in hardware development and evaluation of Chiplytics prototype system.
Spacecraft must survive and operate reliably in the space environment for long periods of time. Radiation, temperature variations, spacecraft charging, surface contamination, and micrometeoroids/space debris all present environmental challenges to spacecraft missions. The environmental issues associated with these effects require in-situ space experiments to properly quantify the environment and its effects. To obtain data on specific microelectronic and sensor systems in the space environment, several engineering experiments were developed for the Clementine spacecraft and the Clementine lunar transfer booster or Interstage Adapter Satellite (ISAS). These platforms allowed testing of advanced spacecraft microelectronic and sensor devices in a lunar transfer orbit that intersects Earth's radiation belts and debris environment and in interplanetary space where direct exposure to solar flares, Galactic Cosmic Rays, and micrometeoroids was possible. A suite of experiments was developed by the Naval Research Laboratory (NRL), the Jet Propulsion Laboratory (JPL), NASA Langley Research Center (LaRC), the Aerospace Corporation, and NASA Goddard Space Flight Center (GSFC) to investigate in detail specific radiation and environmental reliability issues. This paper presents an introduction to the issues being investigated, the instruments provided for the mission, and the rationale for the engineering program.
With the advent of high-strength composite materials and microelectronics, flywheels are becoming attractive as a means of storing electrical energy. In addition to the high energy density that flywheels provide, other advantages over conventional electrochemical batteries include long life, high reliability, high efficiency, greater operational flexibility, and higher depths of discharge. High pulse energy is another capability that flywheels can provide. These attributes are favorable for satellites as well as terrestrial energy storage applications. In addition to energy storage for satellites, the several flywheels operating concurrently can provide attitude control, thus combine two functions into one system. This translates into significant weight savings. The NASA Glenn Research Center is involved in the development of this technology for space and terrestrial applications. Glenn is well suited for this research because of its world-class expertise in power electronics design, rotor dynamics, composite material research, magnetic bearings, and motor design and control. Several Glenn organizations are working together on this program. The Structural Mechanics and Dynamics Branch is providing magnetic bearing, controls, and mechanical engineering skills. It is working with the Electrical Systems Development Branch, which has expertise in motors and generators, controls, and avionics systems. Facility support is being provided by the Space Electronic Test Engineering Branch, and the program is being managed by the Space Flight Project Branch. NASA is funding an Aerospace Flywheel Technology Development Program to design, fabricate, and test the Attitude Control/Energy Storage Experiment (ACESE). Two flywheels will be integrated onto a single power bus and run simultaneously to demonstrate a combined energy storage and 1-degree-of-freedom momentum control system. An algorithm that independently regulates direct-current bus voltage and net torque output will be experimentally demonstrated.
Ultrathin freestanding films with well-defined micro/nanostructures and robust mechanical properties are applied in many engineering applications including microelectronics, optics, filtration and separation, biomedical engineering, and nanotechnology. Although considerable efforts have been made toward the fabrication of freestanding thin films, it is still a significant challenge to develop a simple and reliable process for producing freestanding films with ultrathin thickness, well-regulated micro/nanopatterns, robust mechanical properties, macroscopic coverage area, and multi-layered composite structures. In this work, a significant advancement is reported in this regard. This study shows a new sacrificial-layer-free (SLF) lifting-off process, integrated with conventional micro- and nanolithography, enabling the release of micro- and nanopatterned photoresist (PR) films from the supporting substrate with unprecedented pattern coverage and structure characteristics. The freestanding PR film is resilient, can withstand significant bending and deformation, and is sufficiently flexible to be transferred onto substrates with 3D topography as a conformal soft stencil for further technological processing and applications. Moreover, the SLF lifting-off process provides a simple approach to prepare single-layered and multi-layered freestanding composite films. The results suggest that the novel SLF lifting-off process can significantly extend the capability of 3D micro-/nanofabrication.
Improved methods of heat dissipation are required for modern, high-power density electronic systems. As increased functionality is progressively compacted into decreasing volumes, this need will be exacerbated. High-performance chip power is predicted to increase monotonically and rapidly with time. Systems utilizing these chips are currently reliant upon decades of old cooling technology. Heat pipes offer a solution to this problem. Heat pipes are passive, self-contained, two-phase heat dissipation devices. Heat conducted into the device through a wick structure converts the working fluid into a vapor, which then releases the heat via condensation after being transported away from the heat source. Heat pipes have high thermal conductivities, are inexpensive, and have been utilized in previous space missions. However, the cylindrical geometry of commercial heat pipes is a poor fit to the planar geometries of microelectronic assemblies, the copper that commercial heat pipes are typically constructed of is a poor CTE (coefficient of thermal expansion) match to the semiconductor die utilized in these assemblies, and the functionality and reliability of heat pipes in general is strongly dependent on the orientation of the assembly with respect to the gravity vector. What is needed is a planar, semiconductor-based heat pipe array that can be used for cooling of generic MCM (multichip module) assemblies that can also function in all orientations. Such a structure would not only have applications in the cooling of space electronics, but would have commercial applications as well (e.g. cooling of microprocessors and high-power laser diodes). This technology is an improvement over existing heat pipe designs due to the finer porosity of the wick, which enhances capillary pumping pressure, resulting in greater effective thermal conductivity and performance in any orientation with respect to the gravity vector. In addition, it is constructed of silicon, and thus is better suited for the cooling of semiconductor devices.
Zyvex Labs has created several p-n junction devices with a variety of gaps between the boron and phosphorus electrodes, from 0-7.7 nm, which are now being measured. We have developed a different contacting process based on palladium disilicide rather than aluminium to improve the reliability of the device contacts. Preliminary measurements indicate that these new contacts are successfully contacting the buried dopant layers, which are intact after the overgrowth process. Modelling of the p-n junction properties has made good progress, with the model matching previous published data, and modelling of n-p-n junction devices has begun. This now awaits experimental validation.
Future small satellite systems for both Earth observation as well as deep-space exploration are greatly enabled by the technological advances in deep sub-micron microelectronics technologies. Whereas these technological advances are being fueled by the commercial (non-space) industries, more recently there has been an exciting new synergism evolving between the two otherwise disjointed markets. In other words, both the commercial and space industries are enabled by advances in low-power, highly integrated, miniaturized (low-volume), lightweight, and reliable real-time embedded systems. Recent announcements by commercial semiconductor manufacturers to introduce Silicon On Insulator (SOI) technology into their commercial product lines is driven by the need for high-performance low-power integrated devices. Moreover, SOI has been the technology of choice for many space semiconductor manufacturers where radiation requirements are critical. This technology has inherent radiation latch-up immunity built into the process, which makes it very attractive to space applications. In this paper, we describe the advanced microelectronics and avionics technologies under development by NASA's Deep Space Systems Technology Program (also known as X2000). These technologies are of significant benefit to both the commercial satellite as well as the deep-space and Earth orbiting science missions. Such a synergistic technology roadmap may truly enable quick turn-around, low-cost, and highly capable small satellite systems for both Earth observation as well as deep-space missions.
Wurtzite ( Al , Sc ) N ferroelectrics are attractive for microelectronics applications due to their chemical and structural compatibility with wurtzite semiconductors, such as Ga N and ( Al , Ga ) N . However, the leakage current in epitaxial stacks reported to date should be reduced for reliable device operation. Here, we demonstrate low leakage current in epitaxial Al 0.7 Sc 0.3 N films on Ga N with well-saturated ferroelectric hysteresis loops that are orders of magnitude lower (i.e., 0.07 A cm − 2 ) than previously reported films (1–19 A cm − 2 ) having similar or better structural characteristics. We also show that, for these high-quality epitaxial ( Al , Sc ) N films, structural quality (edge and screw dislocations), as measured by diffraction techniques, is not the dominant contributor to leakage. Instead, the small leakage in our films is limited by thermionic emission across the interfaces, which is distinct from the large leakage due to trap-mediated bulk transport in the previously reported ( Al , Sc ) N films. To support this conclusion, we show that Al 0.7 Sc 0.3 N on lattice-matched In 0.18 Ga 0.82 N buffers with improved structural characteristics but higher interface roughness exhibit increased leakage characteristics. This demonstration of low leakage current in heteroepitaxial ( Al , Sc ) N films and understanding of the importance of interface barrier and surface roughness can guide further efforts toward improving the reliability of wurtzite ferroelectric devices. Published by the American Physical Society 2025
To safely and reliably operate without a human driver, connected and automated vehicles (CAVs) require more advanced computing hardware and software solutions than are implemented today in vehicles that provide driver-assistance features. A workshop was held to discuss advanced microelectronics and computing approaches that can help meet future energy and computational requirements for CAVs. Workshop questions were posed as follows: will highly automated vehicles be viable with conventional computing approaches or will they require a step-change in computing; what are the energy requirements to support on-board sensing and computing; and what advanced computing approaches could reduce the energy requirements while meeting their computational requirements? At present, there is no clear convergence in the computing architecture for highly automated vehicles. However, workshop participants generally agreed that there is a need to improve the computing performance per watt by at least 10x to advance the degree of automation. Participants suggested that DOE and the national laboratories could play a near-term role by developing benchmarks for determining and comparing CAV computing performance, developing public data sets to support algorithm and software development, and contributing precompetitive advancements in energy efficient computing.
This viewgraph presentation reviews NASA's Electronic Parts and Packaging (NEPP) Program. The NEPP mission is to provide guidance to NASA for the selection and and application of microelectronics technologies, to improve understanding of the risks related to the use of these technologies in the space environment and to ensure that appropriate research is performed to meet NASA mission needs. The NEPP Program focuses on the reliability aspects of electronic devices. Three principal aspects to this reliability: (1) lifetime, (2) effects of space radiation and the space environment, and (3) creation and maintenance of the assurance support infrastructure required for success.