A NEW RADIATION DAMAGE RESISTANT SOLAR CELL
Solar cell resistant to radiation damage - silicon p-n junction
SILICON↗
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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Application of the SEM to the measurement of solar cell parameters
A pair of techniques are described which make use of the SEM to measure, respectively, the minority carrier diffusion length and the metallurgical junction depth in silicon solar cells. The former technique permits the measurement of the true bulk diffusion length through the application of highly doped field layers to the back surfaces of the cells being investigated. The technique yields an absolute value of the diffusion length from a knowledge of the collected fraction of the injected carriers and the cell thickness. It is shown that the secondary emission contrast observed in the SEM on a reverse-biased diode can depict the location of the metallurgical junction if the diode has been prepared with the proper beveled geometry. The SEM provides the required contrast and the option of high magnification, permitting the measurement of extremely shallow junction depths.
Weizer, V. G.↗
Progress Towards SiC ASICs for Extreme Temperature and Radiation Environments
This presentation describes development and demonstrations of semiconductor integrated circuits (ICs) and ceramic packaging that are arguably the most environmentally durable transistor electronics ever demonstrated. Silicon carbide (SiC) junction field effect transistor-resistor (JFET-R) ICs fabricated by NASA Glenn Research Center with two-level interconnect have successfully operated for over 1 year in 500 °C air-ambient, 60 days in 460 °C and 9.3 MPa pressure caustic Venus surface environment test chamber, and radiation exposure through 7 Mrad(Si) total ionizing dose (TID) and 86 MeV-cm2/mg heavy ion strikes. Furthermore, these ICs have also demonstrated operation from -190 °C to +812 °C (over 1000 °C temperature span) without significant change in signal (input /output) or power supply voltages. While the operating frequency and functional complexity is far below silicon-based ICs, these SiC application specific ICs (ASICs) are nevertheless becoming capable of providing unique and advantageous harsh-environment circuit functionality without cooling/sheltering overhead. With modest adjustments, the SiC JFET-R fabrication process is compatible with semiconductor mass-production tools and materials. As an initial step towards manufacture, a majority of processing steps to realize the next SiC JFET-R IC prototype wafer run have been outsourced to commercial foundry. It is expected that further upscaling combined with technology transfer to commercial production will lower investment and risk barriers to useful application deployment.
high temperature↗
4H-SiC JFET Multilayer Integrated Circuit Technologies Tested Up to 1000 K
Testing of semiconductor electronics at temperatures above their designed operating envelope is recognized as vital to qualification and lifetime prediction of circuits. This work describes the high temperature electrical testing of prototype 4H silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) technology implemented with multilayer interconnects; these ICs are intended for prolonged operation at temperatures up to 773K (500 C). A 50 mm diameter sapphire wafer was used in place of the standard NASA packaging for this experiment. Testing was carried out between 300K (27 C) and 1150K (877 C) with successful electrical operation of all devices observed up to 1000K (727 C).
JFET↗
Epitaxial process development for monolithic complementary MOS-FET structures with P-N JUNCTION isolation Final report, 1 Feb. - 15 Jul. 1965
Epitaxial deposition of P-type silicon into etche grooves in N-type silicon for P-N junction for complimentary MOS-FET devices
P-N JUNCTION↗
Development of ion implantation techniques for microelectronics
Ion implantation techniques for p-n junction diodes of silicon carbide and gallium arsenide
Dunlap, H. L.↗
Computer-aided prediction of high-frequency performance limits in silicon bipolar integrated circuits
A circuit model for an existing silicon integrated bipolar junction transistor (IBJT) is used to evaluate presently achievable high frequency circuit performance. The relationship between circuit model and processing parameters are semi-quantitatively explored to make predictions on the frequency response, which can be achieved through realistic device fabrication modifications. A new figure of merit is introduced, which is defined as the signal frequency at which an integrated bipolar junction transistor can deliver a power gain of G. The most sensitive parameter influencing attainable high frequency IBJT performance is base resistance.
Burns, J. L.↗
Non-mass-analyzed ion implantation equipment for high volume solar cell production
Equipment designed for junction formation in silicon solar cells is described. The equipment, designed for a production level of approximately one megawatt per year, consists of an ion implanter and annealer. Low cost is achieved by foregoing the use of mass analysis during the implantation, and by the use of a belt furnace for annealing. Results of process development, machine design and cost analysis are presented.
Armini, A. J.↗
The effect of different module configurations on the radiation tolerance of multijunction solar cells
The effect of different module configurations on the performance of multijunction (MJ) solar cells in a radiation environment was investigated. Module configuration refers to the electrical circuit in which the subcells of the multijunction cell are wired. Experimental data for AlCaAs, GaAs, InGaAs, and silicon single-junction concentrator cells subjected to 1 MeV electron irradiation was used to calculate the expected performance of AlGaAs/InGaAs, AlGa/silicon, GaAs/InGaAs, and GaAs/silicon Mj concentrator cells. These calculations included independent, series, and voltage-matched configurations. The module configuration was found to have a significant impact on the radiation tolerance characteristic of the MJ cells.
Gee, James M.↗
Practical SiC JFET-R Analog Integrated Circuit Design for Extreme Environment Applications
Silicon carbide (SiC) junction field effect transistor and SiC resistor (SiC JFET-R) integrated circuits(ICs) have uniquely demonstrated prolonged operation above 450 °C that promises significant operational improvements to a variety of NASA missions. However, the SiC epiwafers used to fabricate these ICs suffer from epi-growth process immaturity that imparts large and systematic spreads in JFET threshold voltages as a function of the device distance from the center on the wafer. Furthermore, the unprecedently wide range of intended application operating temperatures (in many cases over 600 °C wide) imparts as much as 5-fold change in JFET bias currents. This Technical Memorandum documents methods by which both temperature and radius associated JFET electrical parameter variances can be adequately eliminated, or even exploited in JFET-R circuit designs. Full analog circuit examples, including operational amplifiers, and SPICE simulations across experimentally documented SiC JFET parameter extremes are given to illustrate the efficacy of these methods. The reader may use the examples in this memorandum as either an end point, to get a desired analog signal conditioning design into hardware implemented in SiC JFET-R ICs, or as a basis point from which to derive further improvement.
Michael J Krasowski↗
Fabrication of high-quality superconductor-insulator-superconductor junctions on thin SiN membranes
We have successfully fabricated high-quality and high-current density superconductor-insulator-superconductor (SIS) junctions on freestanding thin silicon nitride (SIN) membranes. These devices can be used in a novel millimeter-wave and THz receiver system which is made using micromachining. The SIS junctions with planar antennas were fabricated first on a silicon wafer covered with a SiN membrane, the Si wafer underneath was then etched away using an anisotropic KOH etchant. The current-voltage characteristics of the SIS junctions remained unchanged after the whole process, and the junctions and the membrane survived thermal cycling.
Garcia, Edouard↗
Field and charge dependence of radiation damage in silicon.
Impurity concentration effect of electron irradiation damage in photovoltaic silicon cell with shallow p-n junction
SILICON↗
Investigation of the radiation resistance of triple-junction a-Si:H alloy solar cells irradiated with 1.00 MeV protons
The effect of 1.00 MeV proton irradiation on hydrogenated amorphous silicon alloy triple-junction solar cells is reported for the first time. The cells were designed for radiation resistance studies and included 0.35 cm(sup 2) active areas on 1.0 by 2.0 cm(sup 2) glass superstrates. Three cells were irradiated through the bottom contact at each of six fluences between 5.10E12 and 1.46E15 cm(sup -2). The effect of the irradiations was determined with light current-voltage measurements. Proton irradiation degraded the cell power densities from 8.0 to 98 percent for the fluences investigated. Annealing irradiated cells at 200 C for two hours restored the power densities to better than 90 percent. The cells exhibited radiation resistances which are superior to cells reported in the literature for fluences less than 1E14 cm(sup -2).
Lord, Kenneth R., II↗
Contact resistivities of sputtered TiN and Ti-TiN metallizations on solar-cell-type-silicon
The resistivities of TiN and Ti-TiN contacts on a shallow junction solar-cell-type silicon substrate have been determined by the method of the transmission line model. The contacts investigated are shown to be suitable for standard solar cells from an electrical point of view. Contact resistivity values of the order of 0.0001 ohm/sq cm as obtained for the n(+)Si-TiSi2-TiN contact system may be acceptable for concentrations up to 100 times, but lower values are necessary beyond this point.
Maenpaa, M.↗
Thin silicon solar cell performance characteristics
Refined techniques for surface texturizing, back surface field and back surface reflector formation were evaluated for use with shallow junction, single-crystal silicon solar cells. Each process was characterized individually and collectively as a function of device thickness and bulk resistivity. Among the variables measured and reported are open circuit voltage, short circuit current and spectral response. Substantial improvements were obtained by the utilization of a low cost aluminum paste process to simultaneously remove the unwanted n(+) diffused region, form the back surface field and produce an ohmic contact metallization. The highly effective BSF which results from applying this process has allowed fabrication of cells 0.05 mm thick with initial outputs as high as 79.5 mW/4 sq cm (28 C, AM0) and superior electron radiation tolerance. Cells of 0.02 mm to 0.04 mm thickness have been fabricated with power to mass ratios well in excess of 2 watts per gram.
Gay, C. F.↗
Advances in Single and Multijunction III-V Photovoltaics on Silicon for Space Power
A collaborative research effort at MIT, Ohio State University and NASA has resulted in the demonstration of record quality gallium arsenide (GaAs) based single junction photovoltaic devices on silicon (Si) substrates. The ability to integrate highly efficient, radiation hard III-V based devices on silicon offers the potential for dramatic reductions in cell mass (approx.2x) and increases in cell area. Both of these improvements offer the potential for dramatic reductions in the cost of on-orbit electrical power. Recently, lattice matched InGaP/GaAs and metamorphic InGaP/InGaAs dual junction solar cells were demonstrated by MBE and OMVPE, respectively. Single junction GaAs on Si devices have been integrated into a space flight experiment (MISSES), scheduled to be launched to the International Space Station in March of 2005. I-V performance data from the GaAs/Si will be collected on-orbit and telemetered to ground stations daily. Microcracks in the GaAs epitaxial material, generated because of differences in the thermal expansion coefficient between GaAs and Si, are of concern in the widely varying thermal environment encountered in low Earth orbit. Ground based thermal life cycling (-80 C to + 80 C) equivalent to 1 year in LEO has been conducted on GaAs/Si devices with no discernable degradation in device performance, suggesting that microcracks may not limit the ability to field GaAs/Si in harsh thermal environments. Recent advances in the development and testing of III-V photovoltaic devices on Si will be presented.
Wilt, David M.↗
Excimer laser annealing to fabricate low cost solar cells
The objective is to show whether or not pulsed excimer laser annealing (PELA) of ion-implanted junctions is a cost effective replacement for diffused junctions in fabricating crystalline silicon solar cells. The preliminary economic analysis completed shows that the use of PELA to fabricate both the front junction and back surface field (BSF) would cost approximately 35 cents per peak watt (Wp), compared to a cost of 15 cents/Wp for diffusion, aluminum BSF and an extra cleaning step in the baseline process. The cost advantage of the PELA process depends on improving the average cell efficiency from 14% to 16%, which would lower the overall cost of the module by about 15 cents/Wp. An optimized PELA process compatible with commercial production is to be developed, and increased cell efficiency with sufficient product for adequate statistical analysis demonstrated. An excimer laser annealing station was set-up and made operational. The first experiment used 248 nm radiation to anneal phosphorus implants in polished and texture-etched silicon.
Source record↗
Solar Cells From Metallurgical-Grade Silicon
Epitaxial deposition produces acceptable solar cells from metallurgicalgrade silicon. Instead of diffusing dopants into silicon to form pn junction, junction is formed by growing epitaxial layer--one having crystal structure continuous with that of substrate--on metallurgical-grade silicon. Less pure forms of silicon, such as metallurgical-grade, are less expensive than semiconductor-grade material and help to lower cost of solar cells.
Daiello, R. V.↗