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In this presentation we will provide basic radiation effects on electronics, information on radiation effects and sources, a review of domestic SEE facilities and other radiation test facilities.
Single-event effect (SEE) and total ionizing dose (TID) test results are presented for various hardened and commercial power metal-oxide-semiconductor field effect transistors (MOSFETs), including vertical planar, trench, superjunction, and lateral process designs.
The purpose of this test was to characterize single event effects (SEE) in the LCMXO3D-9400HC-5BG484I, a low power and low density field programmable gate array (FPGA). The SEE concerns for the device that were investigated in this testing are single event upsets (SEUs) in the configuration static random-access memory (SRAM), SEUs in the FPGA fabric, single event latch up (SEL), and single event functional interrupts (SEFIs). Testing was conducted at Lawrence Berkeley National Laboratory (LBNL) on August 26th, 2024 and August 28th, 2024.
The purpose of this test is to assess the single event effects (SEE) and radiation susceptibility of the Intel Optane Memory device (SSD) containing the 3D Xpoint phase change memory (PCM) technology. This test is supported by the NASA Electronics Parts and Packaging Program (NEPP).
This paper reports heavy ion and proton-induced single event effect (SEE) results from recent tests for a variety of microelectronic devices. The compendium covers devices tested over the last two years by the Jet Propulsion Laboratory.
The purpose of this testing was to characterize the pulsed-laser-induced single event effect (SEE) susceptibility of the Texas Instruments LM7171 voltage feedback amplifier. The test was conducted at the Naval Research Laboratory using their two-photon absorption (TPA) laser.
NASA spacecraft are subjected to a harsh space environment that includes exposure to various types of ionizing radiation. The performance of electronic devices in a space radiation environment are often limited by their susceptibility to single event effects (SEE). Ground-based testing is used to evaluate candidate spacecraft electronics to determine risk to spaceflight applications. Interpreting the results of radiation testing of complex devices is and adequate understanding of the test condition is critical. Studies discussed herein were undertaken to establish the application-specific sensitivities of candidate spacecraft and emerging electronic devices to single-event upset (SEU), single-event latchup (SEL), single-event gate rupture (SEGR), single-event burnout (SEB), and single-event transient (SET). For total ionizing dose (TID) and displacement damage dose (DDD) results, see a companion paper submitted to the 2015 Institute of Electrical and Electronics Engineers (IEEE) Nuclear and Space Radiation Effects Conference (NSREC) Radiation Effects Data Workshop (REDW) entitled "compendium of Current Total Ionizing Dose and Displacement Damage for Candidate Spacecraft Electronics for NASA by M. Campola, et al.
This book of knowledge (BoK) provides a critical review of the benefits and difficulties associated with using proton irradiation as a means of exploring the radiation hardness of commercial-off-the-shelf (COTS) systems. This work was developed for the NASA Electronic Parts and Packaging (NEPP) Board Level Testing for the COTS task. The fundamental findings of this BoK are the following. The board-level test method can reduce the worst case estimate for a board's single-event effect (SEE) sensitivity compared to the case of no test data, but only by a factor of ten. The estimated worst case rate of failure for untested boards is about 0.1 SEE/board-day. By employing the use of protons with energies near or above 200 MeV, this rate can be safely reduced to 0.01 SEE/board-day, with only those SEEs with deep charge collection mechanisms rising this high. For general SEEs, such as static random-access memory (SRAM) upsets, single-event transients (SETs), single-event gate ruptures (SEGRs), and similar cases where the relevant charge collection depth is less than 10 μm, the worst case rate for SEE is below 0.001 SEE/board-day. Note that these bounds assume that no SEEs are observed during testing. When SEEs are observed during testing, the board-level test method can establish a reliable event rate in some orbits, though all established rates will be at or above 0.001 SEE/board-day. The board-level test approach we explore has picked up support as a radiation hardness assurance technique over the last twenty years. The approach originally was used to provide a very limited verification of the suitability of low cost assemblies to be used in the very benign environment of the International Space Station (ISS), in limited reliability applications. Recently the method has been gaining popularity as a way to establish a minimum level of SEE performance of systems that require somewhat higher reliability performance than previous applications. This sort of application of the method suggests a critical analysis of the method is in order. This is also of current consideration because the primary facility used for this type of work, the Indiana University Cyclotron Facility (IUCF) (also known as the Integrated Science and Technology (ISAT) hall), has closed permanently, and the future selection of alternate test facilities is critically important. This document reviews the main theoretical work on proton testing of assemblies over the last twenty years. It augments this with review of reported data generated from the method and other data that applies to the limitations of the proton board-level test approach. When protons are incident on a system for test they can produce spallation reactions. From these reactions, secondary particles with linear energy transfers (LETs) significantly higher than the incident protons can be produced. These secondary particles, together with the protons, can simulate a subset of the space environment for particles capable of inducing single event effects (SEEs). The proton board-level test approach has been used to bound SEE rates, establishing a maximum possible SEE rate that a test article may exhibit in space. This bound is not particularly useful in many cases because the bound is quite loose. We discuss the established limit that the proton board-level test approach leaves us with. The remaining possible SEE rates may be as high as one per ten years for most devices. The situation is actually more problematic for many SEE types with deep charge collection. In cases with these SEEs, the limits set by the proton board-level test can be on the order of one per 100 days. Because of the limited nature of the bounds established by proton testing alone, it is possible that tested devices will have actual SEE sensitivity that is very low (e.g., fewer than one event in 1 × 10(exp 4) years), but the test method will only be able to establish the limits indicated above. This BoK further examines other benefits of proton board-level testing besides hardness assurance. The primary alternate use is the injection of errors. Error injection, or fault injection, is something that is often done in a simulation environment. But the proton beam has the benefit of injecting the majority of actual SEEs without risk of something being missed, and without the risk of simulation artifacts misleading the SEE investigation.
The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic versus mission specific device evaluation, single event latch-up (SEL) test and analysis, SEE response visibility enhancement during radiation testing, mitigation evaluation (embedded and user-implemented), unreliable design and its affects to SEE Data, testing flushable architectures versus non-flushable architectures, intellectual property core (IP Core) test and evaluation (addresses embedded and user-inserted), heavy-ion energy and linear energy transfer (LET) selection, proton versus heavy-ion testing, fault injection, mean fluence to failure analysis, and mission specific system-level single event upset (SEU) response prediction. Most sections within the guidelines manual provide information regarding best practices for test structure and test system development. The scope of this manual addresses academic versus mission specific device evaluation and visibility enhancement in IP Core testing.
Total ionizing dose (TID) and single-event effect (SEE) room-temperature radiation test results are presented for developmental prototype 4H-SiC junction field effect transistor (JFET) semiconductor integrated circuits (ICs) that have demonstrated prolonged operation in extremely high-temperature (500 °C) environments. The devices tested demonstrated over 7 Mrad(Si) TID tolerance and no destructive SEE susceptibility.
The LTC6103HMS8#PBF (henceforth abbreviated as LTC6103) current sense amplifier from Linear Technology was tested for both destructive and non-destructive single-event effects (SEE) using the heavy-ion cyclotron accelerator beam at Lawrence Berkeley National Laboratory (LBNL) Berkeley Accelerator Effects (BASE) facility. During testing, the input voltages and output currents were monitored to detect single event latch-up (SEL) and single-event transients (SETs).
The purpose of this testing was to obtain sample pulsed-laser-induced single event transients (SETs) of the Analog Devices AD620 Instrumentation Amplifier. The test was conducted at the Naval Research Laboratory using their two-photon absorption (TPA) laser.
The Xilinx Virtex-II Pro is a platform FPGA that embeds multiple microprocessors within the fabric of an SRAM-based reprogrammable FPGA. The variety and quantity of resources provided by this family of devices make them very attractive for spaceflight applications. However, these devices will be susceptible to single event effects (SEE), which must be mitigated. To use the Virtex-II Pro reliably in space applications, these devices must first be tested to determine if they are susceptible to single event latchup (SEL), the degree to which they are susceptible to single event upsets (SEU) and single event transients (SET), and how these effects are manifested in the device. With this information, mitigations schemes can be developed and tested that address the specific susceptiblities of these devices. This initial SEE test uses a commercial off the shelf Virtex-II Pro evaluation board, with a single processor XC2VP7 FPGA. The FPGA on this board is an acid etched device, which can be partially covered with a shield. The shield covers a portion of the logic, routing, and memory resources along with some of the RocketIO transceivers. The processor, along with a large portion of logic, routing, memory, and transceivers are left exposed. This test will be performed at the Cyclotron Laboratories at Texas A&M University and Michigan State University using ions of varying energy levels and fluencies.
This study was undertaken to determine the single event effect (SEE) susceptibility of the commercial silicon carbide 1200V Schottky diode manufactured by Cree, Inc. Heavy-ion testing was conducted at the Texas A&M University Cyclotron Single Event Effects Test Facility (TAMU). Its purpose was to evaluate this device as a candidate for use in the Solar-Electric Propulsion flight project.
The purpose of this testing was to examine the potential for destructive single event effects (SEE) in Broadcom’s ACPL-785E optocoupler in support of a NASA GSFC flight program. SEE testing was conducted NASA Space Radiation Laboratory (NSRL) at Brookhaven National Laboratory where devices with unmodified packaging were irradiated with high energy ions that have sufficient range to pass through the packaging of the device.
The purpose of this testing is to characterize the Single-Event Effect (SEE) response of the Micron MT29F1T08CMHBBJ4 3D NAND Flash memory. The MT29F1T08CMHBBJ4 is a 1Tb NAND Flash memory, consisting of a four-die stack of 256Gb MLC dice packaged in a 132-ball VBGA package. All data presented is the result of testing only the top die (256Gb) of the package. Testing was performed at two heavy-ion cyclotron facilities with an identical test setup, over the course of four test trips from 2017-2019.
This research describes the development of an experimental radiation testing environment to investigate the single event effect (SEE) susceptibility of the 486-DX4 microprocessor. SEE effects are caused by radiation particles that disrupt the logic state of an operating semiconductor, and include single event upsets (SEU) and single event latchup (SEL). The relevance of this work can be applied directly to digital devices that are used in spaceflight computer systems. The 486-DX4 is a powerful commercial microprocessor that is currently under consideration for use in several spaceflight systems. As part of its selection process, it must be rigorously tested to determine its overall reliability in the space environment, including its radiation susceptibility. The goal of this research is to experimentally test and characterize the single event effects of the 486-DX4 microprocessor using a cyclotron facility as the fault-injection source. The test philosophy is to focus on the "operational susceptibility," by executing real software and monitoring for errors while the device is under irradiation. This research encompasses both experimental and analytical techniques, and yields a characterization of the 486-DX4's behavior for different operating modes. Additionally, the test methodology can accommodate a wide range of digital devices, such as microprocessors, microcontrollers, ASICS, and memory modules, for future testing. The goals were achieved by testing with three heavy-ion species to provide different linear energy transfer rates, and a total of six microprocessor parts were tested from two different vendors. A consistent set of error modes were identified that indicate the manner in which the errors were detected in the processor. The upset cross-section curves were calculated for each error mode, and the SEU threshold and saturation levels were identified for each processor. Results show a distinct difference in the upset rate for different configurations of the on-chip cache, as well as proving that one vendor is superior to the other in terms of latchup susceptibility. Results from this testing were also used to provide a mean-time-between-failure estimate of the 486-DX4 operating in the radiation environment for the International Space Station.
The purpose of this testing was to characterize the single event effects (SEE) susceptibility of the TLE4309 adjustable linear low dropout light emitting diode (LED) driver.