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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Theoretical paper discusses response of enhancement-mode metal oxide/semiconductor field-effect transistor to cosmic-ray ion that passes perpendicularly through gate-oxide layers. Even if ion causes no permanent damage, temporary increase of electrical conductivity along track of ion large enough and long enough to cause change in logic state in logic circuit containing MOSFET.
The use of liquid and gas phase sulfur pretreatment of the surface of InP as a way to form a near-ideal passivated surface prior to chemical vapor deposition of SiO2 was investigated. Results of high-frequency and quasi-static capacitance-voltage measurements, as well as enhancement mode insulated gate field-effect transistor (FET) transductance and drain current stability studies, all support the efficacy of this approach for metal-insulator-semiconductor application of this semiconductor. In particular, surface state values in the range of 10 to the 10th to a few 10 to the 11th/sq cm per eV and enhancement mode FET drain current drifts of less than 5 percent over a 12 h test period were measured.
Photovoltaic device senses hydrogen developed to test degradation of diodes with platinum flash gates on backs. Sensing element is p/n junction rather than conventional Schottky barrier or metal oxide/silicon field-effect transistor. Hydrogen-indicating electrical signal modulated optically rather than electrically. Layered structure of hydrogen detector and principle of operation resemble silicon solar photovoltaic cell. Hydrogen detector responds to hydrogen in atmosphere within minutes and recovers quickly when hydrogen removed.
NASA Technical Memorandum discusses physical basis and dc and microwave characteristics of optically-controlled microwave devices described in literature. Emphasis on responses of GaAs/GaAlAs high-electron-mobility transistors (HEMT's) and GaAs metal/semiconductor field-effect transistors (MESFET's) to light. Devices used to detect radio-frequency modulation of optical signals, to control gains of amplifiers, and to provide injection locking of oscillators.
Gallium arsenide integrated-circuit chip switches any of three microwave input signals to any of three output ports. Measuring 4.9 mm on side, chip contains nine field-effect transistor (FET) crosspoint switches. Housed in custom-designed package with standard connectors for easy integration into system. FET's on chip operated as passive switches and consume no static power and insignificant amounts of switching power. Chip module cascades with similar modules into large arrays handling as many as 100 inputs and 100 outputs. Applications include switching and routing vast amounts of data between computers at extremely high speed. On communications satellite, chip switches microwave signals to and from Earth stations and other satellites.
Collection of mathematical models includes second-order effects in n-channel, enhancement-mode, metal-oxide-semiconductor field-effect transistors (MOSFET's). When dimensions of circuit elements relatively large, effects neglected safely. However, as very-large-scale integration of microelectronic circuits leads to MOSFET's shorter or narrower than 2 micrometer, effects become significant in design and operation. Such computer programs as widely-used "Simulation Program With Integrated Circuit Emphasis, Version 2" (SPICE 2) include many of these effects. In second-order models of n-channel, enhancement-mode MOSFET, first-order gate-depletion region diminished by triangular-cross-section deletions on end and augmented by circular-wedge-cross-section bulges on sides.
Circuit proposed to recover energy usually lost in charging and discharging internal gate capacitance of field-effect transistor during high-frequency switching. Scheme includes pulse-forming circuit generating rectangular waveform with zero-level notches near beginning and end of "on" period. Inductor resonates internal gate capacitance so energy recovered during notches.
Neither external bias nor energy-storage components required. Three-terminal semiconductor switching circuit features high switching speed, extremely high turnoff safe operating area (area in current-vs-voltage plane), moderately low forward ("on"-state) voltage drop, and efficient utilization of silicon in design of components. Includes gate-turn-off thyristor (GTO) and low-voltage (low-on-resistance) field-effect transistor (FET-1) connected in series to form cascode pair. Made of commercially available, discrete components, as hybrid circuit package or as monolithic integrated circuit.
Metal-oxide/semiconductor-controlled thyristor (MCT) and metal-oxide/semiconductor field-effect transistor (MOSFET) connected in switching circuit to obtain better performance. Offers high utilization of silicon, low forward voltage drop during "on" period of operating cycle, fast turnon and turnoff, and large turnoff safe operating area. Includes ability to operate at high temperatures, high static blocking voltage, and ease of drive.
Fast switching circuit puts out rectangular pulses of order of kilovolt or greater at typical repetition frequencies as high as hundreds of kilohertz and with rise times as short as 50 ns. Designed around power metal oxide/semiconductor field-effect transistors (MOSFET's). Optically isolated power MOSFET's in series rapidly switch output between high voltages V(sub 1) and V(sub 2). Used to supply power to pulsed laser or to modulate beam of charged particles in laboratory experiment or industrial process.
Current-monitoring and -limiting circuit protects 28-Vdc power supply against steady overload. Provides some protection against sudden peak currents. Acts as limiter, monitoring amplifier, and delayed-action circuit breaker. Consists of pair of power metal oxide/semiconductor field-effect transistors (MOSFET's).
Driver circuit assures availability of 10- to 15-V gate-to-source voltage needed to turn on n-channel metal oxide/semiconductor field-effect transistor (MOSFET) acting as switch in switching voltage regulator. Includes voltage-boosting circuit efficiently providing gate voltage 10 to 15 V above supply voltage. Contains no exotic parts and does not require additional power supply. Consists of NAND gate and dual voltage booster operating in conjunction with pulse-width modulator part of regulator.
The performance of semiconductor and high critical temperature superconductor switches is compared as they are used in delay-line-type microwave and millimeter-wave phase shifters. Such factors as their ratios of the off-to-on resistances, parasitic reactances, power consumption, speed, input-to-output isolation, ease of fabrication, and physical dimensions are compared. Owing to their almost infinite off-to-on resistance ratio and excellent input-to-output isolation, bolometric superconducting switches appear to be quite suitable for use in microwave phase shifters; their only drawbacks are their speed and size. The SUPERFET, a novel device whose operation is based on the electric field effect in high critical temperature ceramic superconductors is also discussed. Preliminary results indicate that the SUPERFET is fast and that it can be scaled; therefore, it can be fabricated with dimensions comparable to semiconductor field-effect transistors.
A shunt switch comprised of a field-effect transistor (Q.sub.1) is employed to commutate a current-fed inverter (10) using thyristors (SCR1, SCR2) or bijunction transistors (Q.sub.2, Q.sub.3) in a full bridge (1, 2, 3, 4) or half bridge (5, 6) and transformer (T.sub.1) configuration. In the case of thyristors, a tapped inverter (12) is employed to couple the inverter to a dc source to back bias the thyristors during commutation. Alternatively, a commutation power supply (20) may be employed for that purpse. Diodes (D.sub.1, D.sub.2) in series with some voltage dropping element (resistor R.sub.12 or resistors R.sub.1, R.sub.2 or Zener diodes D.sub.4, D.sub.5) are connected in parallel with the thyristors in the half bridge and transformer configuration to assure sharing the back bias voltage. A clamp circuit comprised of a winding (18) negatively coupled to the inductor and a diode (D.sub.3) return stored energy from the inductor to the power supply for efficient operation with buck or boost mode.
Memory cells in a matrix are provided by a thin film of amorphous semiconductor material overlayed by a thin film of resistive material. An array of parallel conductors on one side perpendicular to an array of parallel conductors on the other side enable the amorphous semiconductor material to be switched in addressed areas to be switched from a high resistance state to a low resistance state with a predetermined level of electrical energy applied through selected conductors, and thereafter to be read out with a lower level of electrical energy. Each cell may be fabricated in the channel of an MIS field-effect transistor with a separate common gate over each section to enable the memory matrix to be selectively blanked in sections during storing or reading out of data. This allows for time sharing of addressing circuitry for storing and reading out data in a synaptic network, which may be under control of a microprocessor.
This paper describes modeling and experimental work to design and demonstrate a silicon carbide (SiC), single-side-cooled power module. Two SiC metal-oxide-semiconductor field-effect transistors (MOSFET) were used for each switch position and packaged on a metalized ceramic substrate. Thermal modeling was first conducted to optimize the module packaging to minimize junction-to-fluid thermal resistance and device temperature variations. This procedure identified the optimal device placement and baseplate thickness to maximize thermal performance. A heat exchanger - incorporating impinging jets of water-ethylene glycol - was designed to cool the module's baseplate to minimize thermal resistance and pumping power. The heat exchanger used relatively low fluid velocities (<1.5 m/s) to minimize erosion-corrosion effects and relatively large fluid channel sizes (>=1 mm) to prevent clogging. The power module concept was fabricated, and experiments were conducted to measure its thermal performance. Direct current was used to power the module devices, and junction temperatures were measured via device temperature-sensitive parameters. The experimental results were found to be in good agreement with model predictions (within 2%) and yielded junction-to-fluid thermal resistance values as low as about 15 mm2 K/W at relatively low pumping power values. The results demonstrate the improved performance associated with jet impingement cooling and represent an improvement over existing channel-flow-type cold plates, which can enable improvements to power density and reliability.
This study examines the effects of spin-dry (SD) and N 2 blow-dry (ND) techniques on the quality and surface passivation performance of silicon oxide grown in ozone-dissolved deionized water. The SD method achieves greater oxide thickness uniformity, averaging 1.39 nm ± 4.17% across 49 points, compared to 1.68 nm ± 21.67% for the ND wafers. However, persistently poor passivation of ozonated oxide-grown wafers following the SD process is exhibited, with carrier lifetime, τ eff < 0.3 ms and saturation current density, J 0 (per side) ranging from 26 to 45 fA cm 2 . These findings are analyzed in the context of the fundamental phenomena involved in the drying processes of both techniques. Following this, an optimized spin-drying process is developed, resulting in improved τ eff and J 0 values of 1.4 ms and 5.6 fA cm –2 , respectively. Scanning electron microscopy further confirms that the oxide films dried with the enhanced SD technique are free of pinholes.
Conductivity modulation via ferroelectric polarization coupling with LaNiO 3 (LNO) is demonstrated at an epitaxial ferroelectric–LNO interface. Conductivity measurements, varying the thickness of the LNO channel, show that this phenomenon is confined to a few atomic layers at the interface. Combining in situ biasing and off-axis holography, we mapped out electrostatic potentials at the PbZr 0.2 Ti 0.8 O 3 (PZT)/LNO/SrTiO 3 (STO) heterostructure upon polarization switching. Using aberration-corrected STEM, the interfacial atomic structures were investigated for the two different PZT polarization states. Polarization in PZT induces a significant change in the in-plane O–Ni–O bond angles, with a 37° modulation in the topmost 1 or 2 LNO unit cells, driven by strain in the oxygen sublattice for the two opposite polarization directions in PZT. Both oxygen and cation sublattices exhibit strain responses exceeding 10% upon switching. This atomic-layer structural modulation highlights a mechanism for functional oxide heterostructure development, offering pathways for advancements in nonvolatile memory, sensors, and energy-efficient transistors.