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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8
All sourcesNASA NTRSDOE OSTI
NASA NTRS1991

Comparative study of bolometric and non-bolometric switching elements for microwave phase shifters

The performance of semiconductor and high critical temperature superconductor switches is compared as they are used in delay-line-type microwave and millimeter-wave phase shifters. Such factors as their ratios of the off-to-on resistances, parasitic reactances, power consumption, speed, input-to-output isolation, ease of fabrication, and physical dimensions are compared. Owing to their almost infinite off-to-on resistance ratio and excellent input-to-output isolation, bolometric superconducting switches appear to be quite suitable for use in microwave phase shifters; their only drawbacks are their speed and size. The SUPERFET, a novel device whose operation is based on the electric field effect in high critical temperature ceramic superconductors is also discussed. Preliminary results indicate that the SUPERFET is fast and that it can be scaled; therefore, it can be fabricated with dimensions comparable to semiconductor field-effect transistors.

Tabib-Azar, Massood↗
NASA NTRS1983

Diffraction coupled phase-locked semiconductor laser array

A new monolithic, diffraction coupled phase-locked semiconductor laser array has been fabricated. Stable narrow far-field patterns (approximately 3 deg) and peak power levels of 1 W have been obtained for 100-micron-wide devices with threshold currents as low as 250 mA. Such devices may be useful in applications where high power levels and stable radiation patterns are needed.

Katz, J.↗
NASA NTRS1983

Phase-locked semiconductor laser array with separate contacts

A new monolithic phase-locked semiconductor laser array has been fabricated. Employing two-level metallization, each of the eight elements in the array has a separate contact, thus making it possible to compensate for device nonuniformities and control the near-field and far-field patterns. Threshold currents are approximately 60 mA for each 5-micron-wide laser in the array. Phase locking has been observed via the narrowing of the far-field pattern. Experimental results are compared to those obtained from the same arrays operated with all the lasers connected in parallel.

Katz, J.↗
NASA NTRS2000

Analysis and Optimization of Thin Film Ferroelectric Phase Shifters

Microwave phase shifters have been fabricated from (YBa2Cu3O(7-delta) or Au)/SrTiO3 and Au/Ba(x)Sr(1-x)TiO3 films on LaAlO3 and MgO substrates. These coupled microstrip devices rival the performance of their semiconductor counter-parts parts at Ku- and K-band frequencies. Typical insertion loss for room temperature ferroelectric phase shifters at K-band is approximately equal 5 dB. An experimental and theoretical investigation of these novel devices explains the role of the ferroelectric film in overall device performance. A roadmap to the development of a 3 dB insertion loss phase shifter that would enable a new type of phased array antenna is discussed.

Romanofsky, Robert R.↗
NASA NTRS2011

Rad-Hard, Miniaturized, Scalable, High-Voltage Switching Module for Power Applications Rad-Hard, Miniaturized

A paper discusses the successful development of a miniaturized radiation hardened high-voltage switching module operating at 2.5 kV suitable for space application. The high-voltage architecture was designed, fabricated, and tested using a commercial process that uses a unique combination of 0.25 micrometer CMOS (complementary metal oxide semiconductor) transistors and high-voltage lateral DMOS (diffusion metal oxide semiconductor) device with high breakdown voltage (greater than 650 V). The high-voltage requirements are achieved by stacking a number of DMOS devices within one module, while two modules can be placed in series to achieve higher voltages. Besides the high-voltage requirements, a second generation prototype is currently being developed to provide improved switching capabilities (rise time and fall time for full range of target voltages and currents), the ability to scale the output voltage to a desired value with good accuracy (few percent) up to 10 kV, to cover a wide range of high-voltage applications. In addition, to ensure miniaturization, long life, and high reliability, the assemblies will require intensive high-voltage electrostatic modeling (optimized E-field distribution throughout the module) to complete the proposed packaging approach and test the applicability of using advanced materials in a space-like environment (temperature and pressure) to help prevent potential arcing and corona due to high field regions. Finally, a single-event effect evaluation would have to be performed and single-event mitigation methods implemented at the design and system level or developed to ensure complete radiation hardness of the module.

Adell, Philippe C.↗
NASA NTRS1991

Silicon carbide, a semiconductor for space power electronics

After many years of promise as a high temperature semiconductor, silicon carbide (SiC) is finally emerging as a useful electronic material. Recent significant progress that has led to this emergence has been in the areas of crystal growth and device fabrication technology. High quality single-crystal SiC wafers, up to 25 mm in diameter, can now be produced routinely from boules grown by a high temperature (2700 K) sublimation process. Device fabrication processes, including chemical vapor deposition (CVD), in situ doping during CVD, reactive ion etching, oxidation, metallization, etc. have been used to fabricate p-n junction diodes and MOSFETs. The diode was operated to 870 K and the MOSFET to 770 K.

Powell, J. Anthony↗
NASA NTRS1991

Silicon carbide, a semiconductor for space power electronics

After many years of promise as a high temperature semiconductor, silicon carbide (SiC) is finally emerging as a useful electronic material. Recent significant progress that has led to this emergence has been in the area of crystal growth and device fabrication technology. High quality of single-crystal SiC wafers, up to 25 mm in diameter, can now be produced routinely from boules grown by a high temperature (2700 K) sublimation process. Device fabrication processes, including chemical vapor deposition (CVD), in situ doping during CVD, reactive ion etching, oxidation, metallization, etc. have been used to fabricate p-n junction diodes and MOSFETs. The diode was operated to 870 K and the MOSFET to 770 K.

Powell, J. A.↗
NASA NTRS2004

LERCIP 2004 Summary

This summer I am continuing my project from the previous two summers. My work involves ohmic contacts to N-type silicon carbide (Sic) devices. My mentor, Dr. Robert Okojie, is developing the technology behind high performance sensors and actuators for harsh environments. Sic is useful because it is able to operate at temperatures up to 600 C and it is resistant to radiation damage. This allows sensors and electronics to be placed in new locations, such as inside a jet engine or in space application without using heavy shielding. Ultimately this results in more efficient, smarter engine technology, reduced launch weights for spacecraft, and high power and high temperature electronics. A fundamental part of Sic devices is the ohmic contact. The contact is the interface between the semiconductor (Sic) and external circuitry. The current flowing in and out the devices is through the contact. Ensuring that these contacts remain ohmic (linear I-V behavior) allows us to fabricate devices that do not waste power at the metallurgical junction. Another key part is maintaining a low contact resistance. It is desired to maintain minimum energy loss by avoiding a rectifying electrical characteristic. My project is to develop and implement a testing procedure for measuring the contact resistance while the device is operating at high temperature. It is important to measure the contacts while simulating the true operating environment as closely as possible. For this reason, measurements are taken while the device is heated at intervals up to 600 C in air. To test the long tern reliability of the devices, the high temperature measurements are repeated after heating the sample for long intervals in air. A new set of data is gathered after heating for a total of 100, 200 and then 400 hours. The current as a function of voltage and the contact resistance was measured using the four point probe technique. The four point probe method is chosen because it measures contact resistance while eliminating error due to wire resistance and calibration issues.

DeAngelis, David↗
NASA NTRS2008

Miniaturized metal (metal alloy)/ PdO.sub.x/SiC hydrogen and hydrocarbon gas sensors

A miniaturized Schottky diode hydrogen and hydrocarbon sensor and the method of making same is disclosed and claimed. The sensor comprises a catalytic metal layer, such as palladium, a silicon carbide substrate layer and a thin barrier layer in between the catalytic and substrate layers made of palladium oxide (PdO.sub.x). This highly stable device provides sensitive gas detection at temperatures ranging from at least 450 to 600.degree. C. The barrier layer prevents reactions between the catalytic metal layer and the substrate layer. Conventional semiconductor fabrication techniques are used to fabricate the small-sized sensors. The use of a thicker palladium oxide barrier layer for other semiconductor structures such as a capacitor and transistor structures is also disclosed.

Hunter, Gary W.↗
NASA NTRS2008

Miniaturized Metal (Metal Alloy)/PdO(x)/SiC Hydrogen and Hydrocarbon Gas Sensors

A miniaturized Schottky diode hydrogen and hydrocarbon sensor and the method of making same is disclosed and claimed. The sensor comprises a catalytic metal layer, such as palladium, a silicon carbide substrate layer and a thin barrier layer in between the catalytic and substrate layers made of palladium oxide (PdO(x)). This highly stable device provides sensitive gas detection at temperatures ranging from at least 450 to 600 C. The barrier layer prevents reactions between the catalytic metal layer and the substrate layer. Conventional semiconductor fabrication techniques are used to fabricate the small-sided sensors. The use of a thicker palladium oxide barrier layer for other semiconductor structures such as a capacitor and transistor structures is also disclosed.

Hunter, Gary W.↗
NASA NTRS2011

Miniaturized metal (metal alloy)/ PdO.sub.x/SiC hydrogen and hydrocarbon gas sensors

A miniaturized Schottky diode hydrogen and hydrocarbon sensor and the method of making same is disclosed and claimed. The sensor comprises a catalytic metal layer, such as palladium, a silicon carbide substrate layer and a thin barrier layer in between the catalytic and substrate layers made of palladium oxide (PdO.sub.x ). This highly stable device provides sensitive gas detection at temperatures ranging from at least 450 to 600.degree. C. The barrier layer prevents reactions between the catalytic metal layer and the substrate layer. Conventional semiconductor fabrication techniques are used to fabricate the small-sized sensors. The use of a thicker palladium oxide barrier layer for other semiconductor structures such as a capacitor and transistor structures is also disclosed.

Hunter, Gary W.↗
NASA NTRS2001

Packaging Technology Developed for High-Temperature Silicon Carbide Microsystems

High-temperature electronics and sensors are necessary for harsh-environment space and aeronautical applications, such as sensors and electronics for space missions to the inner solar system, sensors for in situ combustion and emission monitoring, and electronics for combustion control for aeronautical and automotive engines. However, these devices cannot be used until they can be packaged in appropriate forms for specific applications. Suitable packaging technology for operation temperatures up to 500 C and beyond is not commercially available. Thus, the development of a systematic high-temperature packaging technology for SiC-based microsystems is essential for both in situ testing and commercializing high-temperature SiC sensors and electronics. In response to these needs, researchers at Glenn innovatively designed, fabricated, and assembled a new prototype electronic package for high-temperature electronic microsystems using ceramic substrates (aluminum nitride and aluminum oxide) and gold (Au) thick-film metallization. Packaging components include a ceramic packaging frame, thick-film metallization-based interconnection system, and a low electrical resistance SiC die-attachment scheme. Both the materials and fabrication process of the basic packaging components have been tested with an in-house-fabricated SiC semiconductor test chip in an oxidizing environment at temperatures from room temperature to 500 C for more than 1000 hr. These test results set lifetime records for both high-temperature electronic packaging and high-temperature electronic device testing. As required, the thick-film-based interconnection system demonstrated low (2.5 times of the room-temperature resistance of the Au conductor) and stable (decreased 3 percent in 1500 hr of continuous testing) electrical resistance at 500 C in an oxidizing environment. Also as required, the electrical isolation impedance between printed wires that were not electrically joined by a wire bond remained high (greater than 0.4 GW) at 500 C in air. The attached SiC diode demonstrated low (less than 3.8 W/mm2) and relatively consistent dynamic resistance from room temperature to 500 C. These results indicate that the prototype package and the compatible die-attach scheme meet the initial design standards for high-temperature, low-power, and long-term operation. This technology will be further developed and evaluated, especially with more mechanical tests of each packaging element for operation at higher temperatures and longer lifetimes.

Chen, Liang-Yu↗
NASA NTRS1986

Single-Event-Upset Studies: A Compilation

Document summarizes 15 studies of single-event upsets covering 60 different types of semiconductor devices. Studies discussed in document include verification of basic reactions induced by heavy ions and protons and surveys of latchup and bit-flip susceptibility of several types of devices and device-fabrication technologies.

Nichols, D. K.↗
NASA NTRS1997

Investigation of Field Emitter Array Vacuum Microtriodes for Space Electronics Applications

Research into processing techniques for fabrication of vacuum microelectronic devices has been carried out, with special emphasis being given to the growth of silicon dioxide thin films. Oxide films ranging from 30 nm to approximately 2 micrometers have been grown on single crystal silicon wafers. Metal-oxide-semiconductor capacitor test structures have been made from some of these oxide films, and current-versus-voltage plots for these structures have been measured. It has been observed that the rate of applied voltage across the oxide films produces marked differences in measured leakage current. Breakdown fields across two of the thinnest oxide films have been measured and are comparable with highest values reported in literature. Several silicon wafers were processed to make field- emitter array diodes, and were delivered to collaborators at NASA-Lewis Research Center for final fabrication steps and testing.

Smith, Mark A.↗
NASA NTRS2004

Fabrication of a novel gigabit/second free-space optical interconnect - photodetector characterization and testing and system development

The time when computing power is limited by the copper wire inherent in the computer system and not the speed of the microprocessor is rapidly approaching. With constant advances in computer technology, many researchers believe that in only a few years, optical interconnects will begin to replace copper wires in your Central Processing Unit (CPU). On a more macroscopic scale, the telecommunications industry has already made the switch to optical data transmission as, to date, fiber optic technology is the only reasonable method of reliable, long range data transmission. Within the span of a decade, we will see optical technologies move from the macroscopic world of the telecommunications industry to the microscopic world of the computer chip. Already, the communications industry is marketing commercially available optical links to connect two personal computers, thereby eliminating the need for standard and comparatively slow wired and wireless Ethernet transfers and greatly increasing the distance the computers can be separated. As processing demands continue to increase, the realm of optical communications will continue to move closer to the microprocessor and quite possibly onto the microprocessor itself. A day may come when copper connections are used only to supply power, not transfer data. This summer s work marks some of the beginning stages of a 5 to 10 year, long-term research project to create and study a free-space, 1 Gigabit/sec optical interconnect. The research will result in a novel fabricated, chip-to-chip interconnect consisting of a Vertical Cavity Surface Emitting Laser (VCSEL) Diode linked through free space to a Metal- Semiconductor-Metal (MSM) Photodetector with the possible integration of microlenses for signal focusing and Micro-Electromechanical Systems (MEMS) devices for optical signal steering. The advantages, disadvantages, and practicality of incorporating flip-chip mounting technologies will also be addressed. My work began with the design and construction of a test setup for the experiment and then appropriate characterization of the test system. Specifically, I am involved in the characterization of a commercially available 1550nm wavelength, 5mW diode laser and a study of its modulation bandwidth. Commercially produced photodetectors as well as the incorporation of microwave technology, in the form of RF input and output, are used in the characterization procedure. The next stage involves the use of a probe station and network analyzer to characterize and test a series of photodetectors fabricated on a 2 inch, Indium Gallium Arsenide (InGaAs) wafer in the Branch s microlithography lab. Other project responsibilities include, but are not limited to the incorporation of a transimpedance amplifier to the photodetector circuit; a study of VCSEL technology; bit error rate analysis of an optical interconnect system; and analysis of free space divergence of the VCSEL, optical path length of the interconnect; and any other pertinent optical properties of the one gigabit per second interconnect for fabrication and testing.

Savich, Gregory R.↗
NASA NTRS1978

Degradation resistance of semiconductor electroluminescent devices

The P type conductivity layer or layers of an electroluminescent device includes zinc as the primary conductivity modifier, and germanium as the secondary conductivity modifier. The combination of zinc and germanium provide an electroluminescent device having improved reliability. In the method of fabricating the P type conductivity layer, the zinc and germanium are simultaneously introduced into the layer during deposition of the layer.

Ladany, Ivan↗
NASA NTRS1995

NASA Tech Briefs, November 1995

The contents include: 1) Mission Accomplished; 2) Resource Report: Marshall Space Flight Center; 3) NASA 1995 Software of the Year Award; 4) Microbolometers Based on Epitaxial YBa2Cu3O(sub 7-x) Thin Films; 5) Garnet Random-Access Memory; 6) Fabrication of SNS Weak Links on SOS Substrates; 7) High-Voltage MOSFET Switching Circuit; 8) Asymmetric Switching for a PWM H-Bridge Power Circuit; 9) Better Ohmic Contacts for InP Semiconductor Devices; 10) Low-Bandgap Thermovoltaic Materials and Devices; 11) Digital Frequency-Differencing Circuit; 12) Imaging Magnetometer; 13) Computer-Assisted Monitoring of a Complex System; 14) Buffered Telemetry Demodulator; 15) Compact Multifunction Inspection Head; 16) Optical Detection of Fractures in Ceramic Diaphragms; 17) Eddy-Current Detection of Cracks in Reinforced Carbon/Carbon; 18) Apparent Thermal Conductivity of Multilayer Insulation; 19) Optimizing Misch-Metal Compositions in Metal Hydride Anodes; 20) Device for Sampling Surface Contamination; 21) Probabilistic Failure Assessment for Fatigue; 22) Probabilistic Fatigue and Flaw-Propagation Analysis; 23) Windows Program for Driving the TDU-850 Printer; 24) Subband/Transform MATLAB Functions for Processing Images; 25) Computing Equilibrium Chemical Compositions; 26) Program Processes Thermocouple Readings; 27) ICAN-Second-Generation Integrated Composite Analyzer; 28) Integrated Composite Analyzer with Damping Capabilities; 29) Computing Efficiency of Transfer of Microwave Power; 30) Program Calculates Power Demands of Electronic Designs; 31) Cost-Estimation Program; 32) Program Estimates Areas Required by Electronic Designs; 33) Program to Balance Mapped Turbopump Assemblies; 34) BiblioTech; 35) Controlling Mirror Tilt With a Bimorph Actuator; 36) Burst-Disk Device Simulates Effect of Pyrotechnic Device; 37) Bearing-Mounting Concept Accommodates Thermal Expansion; 38) Parallel-Plate Acoustic Absorbers for Hot Environments; 39) Adjustable-Length Strut Withstands Large Cyclic Loads; 40) Tool Indicates Contact Angles in Bearing Raceways; 41) Gravity Slides With Magnetic Braking; 42) High-Torque, Lightweight, Pneumatically Driven Wrench for Small Spaces; 43) Device for Testing Compatibility of an O-Ring; 44) Magnetic Heat Pump Containing Flow Diverters; 45) Variable-Tilt Helicopter Rotor Mast; 46) "Beach-Ball" Robotic Rovers; 47) Apparatus Would Measure Temperatures of Ball Bearings; 48) Flexible Borescope for Inspecting Ducts; 49) Texturing Copper To Reduce Secondary Emission of Electrons; 50) Automated Laser Cutting in Three Dimensions; 51) Algorithm Helps Monitor Engine Operation; 52) Flexible Revision of Data-Processing Communications; 53) Software for Managing the Use of Land; 54) Thermal Strap Increases Cryocooling Efficiency; 55) Reversible Nut With Engagement Indication; 56) Control Algorithms for Kinematically Redundant Manipulators; 57) Computed Hydrogen-Flow Splits in a Rocket Engine; 58) Pressure and Thermal Modeling of Rocket Launches; 59) Field of View of a Spacecraft Antenna: Analysis and Software; 60) Digital Controller for Laser-Beam-Steering Subsystem; 61) More About Beam-Steering Subsystem for Laser Communication; 62) Digital Controller for Laser-Beam-Steering Subsystem: Part 2; 63) Interface Circuit Board for Space-Shuttle Communications; 64) Automated Planning of Spacecraft Telecommunications; 65) Artifacts of Spectral Analysis of Instrument Readings; 66) Neural-Network Controller for Vibration Suppression; 67) Adaptive Finite-Element Computation in Fracture Mechanics; 68) Attitude Control for the Cassini Spacecraft; 69) Analytical Model for Fluid Dynamics in a Microgravity Environment; 70) Study of Rocket-Engine Joints Bonded by NVCU/NARloy-Z; 71) Improved Silicon Nitride for Advanced Heat Engines; 72) Parameters for Welding Aluminum/Lithium Alloys; 73) Lightweight Composite Intertank Structure; 74) Foil Patches Seal Small Vacuum Leaks; 75) Data Base on Cables and Connectors; 76) Effect of Clock Mode on Radiation Hardnessf an ADC; and 77) Fault-Tolerant Control for a Robotic Inspection System.

Source record↗
NASA NTRS2003

Artifacts for Calibration of Submicron Width Measurements

Artifacts that are fabricated with the help of molecular-beam epitaxy (MBE) are undergoing development for use as dimensional calibration standards with submicron widths. Such standards are needed for calibrating instruments (principally, scanning electron microscopes and scanning probe microscopes) for measuring the widths of features in advanced integrated circuits. Dimensional calibration standards fabricated by an older process that involves lithography and etching of trenches in (110) surfaces of single-crystal silicon are generally reproducible to within dimensional tolerances of about 15 nm. It is anticipated that when the artifacts of the present type are fully developed, their critical dimensions will be reproducible to within 1 nm. These artifacts are expected to find increasing use in the semiconductor-device and integrated- circuit industries as the width tolerances on semiconductor devices shrink to a few nanometers during the next few years. Unlike in the older process, one does not rely on lithography and etching to define the critical dimensions. Instead, one relies on the inherent smoothness and flatness of MBE layers deposited under controlled conditions and defines the critical dimensions as the thicknesses of such layers. An artifact of the present type is fabricated in two stages (see figure): In the first stage, a multilayer epitaxial wafer is grown on a very flat substrate. In the second stage, the wafer is cleaved to expose the layers, then the exposed layers are differentially etched (taking advantage of large differences between the etch rates of the different epitaxial layer materials). The resulting structure includes narrow and well-defined trenches and a shelf with thicknesses determined by the thicknesses of the epitaxial layers from which they were etched. Eventually, it should be possible to add a third fabrication stage in which durable, electronically inert artifacts could be replicated in diamondlike carbon from a master made by MBE and etching as described above.

Grunthaner, Frank↗