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At least 145 records · Page 8

NEPP Update of Independent Single Event Upset Field Programmable Gate Array Testing

This presentation provides a NASA Electronic Parts and Packaging (NEPP) Program update of independent Single Event Upset (SEU) Field Programmable Gate Array (FPGA) testing including FPGA test guidelines, Microsemi RTG4 heavy-ion results, Xilinx Kintex-UltraScale heavy-ion results, Xilinx UltraScale+ single event effect (SEE) test plans, development of a new methodology for characterizing SEU system response, and NEPP involvement with FPGA security and trust.

Field Programmable Gate Array (FPGA); Triple Modul↗

Frequency dependence of single-event upset in advanced commercial PowerPC microprocessors

Single-event upset (SEU) from heavy ions is measured for advanced commercial microprocessors in a dynamic mode with clock frequencies up to 1 GHz. Frequency and core voltage dependence of SEUs in registers and D-Cache are discussed. The results of our studies suggest the SEU in registers and D-Cache tend to increase with frequency. This might have important implications for the overall SEU trend as technology moves toward higher frequencies.

Farmanesh, F. F.↗

Single-Event Upset in Flash Memories

This paper discusses single-event upset effets in flash memories, using heavy ions at the Texas A&M cyclotron. Initial results are presented for one manufacturer that compare uspet in the individual memory elemts with the more complex funtion failure modes that occur in the internal state machine and its control registers. This device is designed to function with either 5-V or 3.3-V power supply levels for read operations, but requires an additional 5 or 12-V power supply for write and erase operations.

Flash↗

Angular dependence of DRAM upset susceptibility

Heavy ion irradiations of two types of commercial DRAMs reveal unexpected angular responses. One device's cross section varied by two orders of magnitude with azimuthal angle. Accurate prediction of space rates requires accommodating this effect.

DRAM angle SEU multiple bit upset DRAM upsets↗

Independent Single Event Upset Testing of the Xilinx V5QV

In this presentation, we provide a brief glimpse at preliminary single event test results taken from two years of testing of the Xilinx V5QV Field Programmable Gate Array (FPGA). This presentation includes an overview of test philosophy and implementation.

Single Event Upset Testing↗

Using Classical Reliability Models and Single Event Upset (SEU) Data to Determine Optimum Implementation Schemes for Triple Modular Redundancy (TMR) in SRAM-Based Field Programmable Gate Array (FPGA) Devices

Space applications are complex systems that require intricate trade analyses for optimum implementations. We focus on a subset of the trade process, using classical reliability theory and SEU data, to illustrate appropriate TMR scheme selection.

Field Programmable Gate Array (FPGA)↗

Single-event upset in the PowerPC750 microprocessor

In this paper we report results of single-event tests of the PowerPC750 from Motorola and IBM, which are identical designs which are manufactured with advanced processes that uses a minimum feature size of 0.29 and 0.28 mu m, respectively.

single↗

In-flight observations of multiple-bit upset in DRAMs

In-flight data is examined showing a very high incidence of multiple-bit errors in a solid-state recorder that incorporates error detection and correction. The high MBU rate is shown to be a consequence of the physical selection of memory cell locations in the recorder architecture.

single↗

Proton upsets in LSI memories in space

Two types of large scale integrated dynamic random access memory devices were tested and found to be subject to soft errors when exposed to protons incident at energies between 18 and 130 MeV. These errors are shown to differ significantly from those induced in the same devices by alphas from an Am-241 source. There is considerable variation among devices in their sensitivity to proton-induced soft errors, even among devices of the same type. For protons incident at 130 MeV, the soft error cross sections measured in these experiments varied from 10 to the -8th to 10 to the -6th sq cm/proton. For individual devices, however, the soft error cross section consistently increased with beam energy from 18-130 MeV. Analysis indicates that the soft errors induced by energetic protons result from spallation interactions between the incident protons and the nuclei of the atoms comprising the device. Because energetic protons are the most numerous of both the galactic and solar cosmic rays and form the inner radiation belt, proton-induced soft errors have potentially serious implications for many electronic systems flown in space.

Mcnulty, P. J.↗

Transient upsets in microprocessor controllers

The modeling and analysis of transient faults in microprocessor based controllers are discussed. Such controllers typically consist of a microprocessor, read only memory storing and application program, random access memory for data storage, and input/output devices for external communications. The effects of transient faults on the performance of the controller are reviewed. An instruction level perspective of performance is taken which is the basis of a useful high level program state description of the microprocessor controller. A transition matrix is defined which determines the controller's response to transient fault arrivals.

Glaser, R. E.↗

Upset susceptibility study employing circuit analysis and digital simulation

This paper describes an approach to predicting the susceptibility of digital systems to signal disturbances. Electrical disturbances on a digital system's input and output lines can be induced by activities and conditions including static electricity, lightning discharge, Electromagnetic Interference (EMI) and Electromagnetic Pulsation (EMP). The electrical signal disturbances employed for the susceptibility study were limited to nondestructive levels, i.e., the system does not sustain partial or total physical damage and reset and/or reload will bring the system to an operational status. The front-end transition from the electrical disturbances to the equivalent digital signals was accomplished by computer-aided circuit analysis. The Super-Sceptre (system for circuit evaluation of transient radiation effects) Program was used. Gate models were developed according to manufacturers' performance specifications and parameters resulting from construction processes characteristic of the technology. Digital simulation at the gate and functional level was employed to determine the impact of the abnormal signals on system performance and to study the propagation characteristics of these signals through the system architecture. Example results are included for an Intel 8080 processor configuration.

Carreno, V. A.↗

Analysis of the nature and cause of turbulence upset using airline flight records

The development and application of methods for determining aircraft motions and related winds, using data normally recorded during airline flight operations, are described. The methods are being developed, in cooperation with the National Transportation Safety Board, to aid in the analysis and understanding of circumstances associated with aircraft accidents or incidents. Data from a recent DC-10 encounter with severe, high-altitude turbulence are used to illustrate the methods. The analysis of this encounter shows the turbulence to be a series of equally spaced horizontal swirls known as 'cat's eyes' vortices. The use of flight-data analysis methods to identify this type of turbulence phenomenon is presented for the first time.

Parks, E. K.↗