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64 MeV proton irradiation were conducted on pixel technologies that spans the range of commercially available electronic displays for crewed missions. Human-centric optical performance metrics and at-facility characterization techniques are discussed and reported for assessment of pixel radiation susceptibilities.
Single-event effects and total ionizing dose testing are described for a 32-layer NAND flash memory, in both SLC and MLC configurations, with special considerations for unique three-dimensional test results. Extraction of three-dimensional heavy-ion test data presents a unique visualization of angular effects in NAND flash. Pattern dependence differences between SLC and MLC mode are noted, along with slightly non-uniform angular cross-section results due to the complex volume. Finally, TID data under different operating and bias conditions shows that the failure point remains the higher-voltage erasure circuitry.
We present a novel method of FPGA TID testing that measures propagation delay between flip-flops operating at maximum speed. Measurement is performed on-chip at-speed and provides a key design metric when building system-critical synchronous designs.
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Total ionizing dose irradiations were performed on a 22 nm fully-depleted silicon-on-insulator static random access memory. There is a strong well-bias effect in the TID response. Combined TID and SEE results are also presented.
Total ionizing dose irradiations were performed on a 22 nm fully-depleted silicon-on-insulator static random access memory. There is a strong well-bias effect in the TID response. Combined TID and SEE results are also presented.
In this work, several DC-DC converters were designed and built. The converters are Buck Buck-Boost, Cuk, Flyback, and full-bridge zero-voltage switched. The total ionizing dose radiation and single event effects on the converters were investigated. The experimental results for the TID effects tests show that the voltages of the Buck Buck-Boost, Cuk, and Flyback converters increase as total dose increased when using power MOSFET IRF250 as a switching transistor. The change in output voltage with total dose is highest for the Buck converter and the lowest for Flyback converter. The trend of increase in output voltages with total dose in the present work agrees with those of the literature. The trends of the experimental results also agree with those obtained from PSPICE simulation. For the full-bridge zero-voltage switch converter, it was observed that the dc-dc converter with IRF250 power MOSFET did not show a significant change of output voltage with total dose. In addition, for the dc-dc converter with FSF254R4 radiation-hardened power MOSFET, the output voltage did not change significantly with total dose. The experimental results were confirmed by PSPICE simulation that showed that FB-ZVS converter with IRF250 power MOSFET's was not affected with the increase in total ionizing dose. Single Event Effects (SEE) radiation tests were performed on FB-ZVS converters. It was observed that the FB-ZVS converter with the IRF250 power MOSFET, when the device was irradiated with Krypton ion with ion-energy of 150 MeV and LET of 41.3 MeV-square cm/mg, the output voltage increased with the increase in fluence. However, for Krypton with ion-energy of 600 MeV and LET of 33.65 MeV-square cm/mg, and two out of four transistors of the converter were permanently damaged. The dc-dc converter with FSF254R4 radiation hardened power MOSFET's did not show significant change at the output voltage with fluence while being irradiated by Krypton with ion energy of 1.20 GeV and LET of 25.97 MeV-square cm/mg. This might be due to fact that the device is radiation hardened.
Total ionizing dose irradiations were performed on a 22 nm fully-depleted silicon-on-insulator static random access memory. There is a strong well-bias effect in the TID response. Combined TID and SEE results are also presented.
This document, the JSC Engineering Directorate Avionics Ionizing Radiation Effects Standard (AIRES), provides design, test, and analysis requirements to ensure electronic hardware meets functional, performance and reliability requirements in the mission ionizing radiation environment. This suite of activities is referred to as Radiation Hardening Assurance (RHA) and is an integral part of the hardware design process.
The shapes of single event transients in linear bipolar circuits are distorted by exposure to total ionizing dose radiation. Some transients become broader and others become narrower. Such distortions may affect SET system error rates in a radiation environment. If the transients are broadened by TID, the error rate could increase during the course of a mission, a possibility that has implications for hardness assurance.
Total Ionizing Dose response (ID) of SDRAM (Synchronous Dynamic Random Access Memory), DDR2 (Double Data Rate2) and DDR3 (Double Data Rate3) memories is reported in static bias, and auto refresh modes. Data analysis reveals some types of memory have significant increases in stuck bits during TID exposure when refreshed.
The purpose of this test was to perform the radiation lot acceptance test (RLAT) for the OP484 (5962R0051701VDA). The quad op-amp was tested for low dose rate response. Device parameters such as input offset voltage, output voltages, supply current and gain were investigated.
Heavy ion single-event measurements and TID response for 8Gb commercial NAND flash memories are reported. Radiation results of multi-level flash technology are compared with results from single-level flash technology. In general, these commercial high density memories appear to be much less susceptible to SEE and have better TID response compared to older generations of flash memories. The charge pump survived up to 600 krads.
The purpose of this test was to characterize the Micron 512 GB NAND (MT29F512G08AUCBBH8-6IT:B) flash memory parameter degradation for total dose response. In the test, the device was exposed to high dose rate (HDR) irradiations using gamma radiation. Device parameters such as leakage currents, quantity of upset bits and overall chip and die health were investigated.
This paper documents recent TID (including ELDRS) and proton damage test results obtained by JPL. Unusual test results, such as abnormally low or high failure levels or unusual failure or response mechanisms, are emphasized.
This presentation discusses the effects of ionizing radiation on single event transients (SETs) in circuits. The exposure of integrated circuits to ionizing radiation changes electrical parameters. The total ionizing dose effect is observed in both complementary metal-oxide-semiconductor (CMOS) and bipolar circuits. In bipolar circuits, transistors exhibit grain degradation, while in CMOS circuits, transistors exhibit threshold voltage shifts. Changes in electrical parameters can cause changes in single event upset(SEU)/SET rates. Depending on the effect, the rates may increase or decrease. Therefore, measures taken for SEU/SET mitigation might work at the beginning of a mission but not at the end following TID exposure. The effect of TID on SET rates should be considered if SETs cannot be tolerated.
We develop methods for bounding part-to-part variation in TID data. When used in conjunction with statistical radiation environment models, these methods allow development of RHA that deliver estimated piece part reliability for any desired confidence level, moving beyond risk avoidance methodologies based on radiation design margin. Two methods are developed, and their results compared for realistic data.
We develop methods for bounding part-to-part variation in TID data. When used in conjunction with statistical radiation environment models, these methods allow development of RHA that deliver estimated piece part reliability for any desired confidence level, moving beyond risk avoidance methodologies based on radiation design margin. Two methods are developed, and their results compared for realistic data.