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Nonlinear model of field effect transistor for computer aided transient analysis of complementary metal oxide semiconductor-field effect transistor NAND gate
New metal-oxide-semiconductor field-effect transistors designed for source-follower preamplifiers operating at liquid-helium temperatures in conjunction with infrared detectors. Lower thresholds and offset give CryoFET's greater dynamic range and linearity than conventional MOSFET's at low temperatures and facilitates pair balancing to reduce offsets in output. Reduces heat loading of cryogenic system, extending life, reliability, and performance of cryogenic infrared instruments.
A shunt switch comprised of a field-effect transistor (Q.sub.1) is employed to commutate a current-fed inverter (10) using thyristors (SCR1, SCR2) or bijunction transistors (Q.sub.2, Q.sub.3) in a full bridge (1, 2, 3, 4) or half bridge (5, 6) and transformer (T.sub.1) configuration. In the case of thyristors, a tapped inverter (12) is employed to couple the inverter to a dc source to back bias the thyristors during commutation. Alternatively, a commutation power supply (20) may be employed for that purpse. Diodes (D.sub.1, D.sub.2) in series with some voltage dropping element (resistor R.sub.12 or resistors R.sub.1, R.sub.2 or Zener diodes D.sub.4, D.sub.5) are connected in parallel with the thyristors in the half bridge and transformer configuration to assure sharing the back bias voltage. A clamp circuit comprised of a winding (18) negatively coupled to the inductor and a diode (D.sub.3) return stored energy from the inductor to the power supply for efficient operation with buck or boost mode.
In this paper, we report successful fabrication of the first large area, monolithic, 1.2 kV 4H-SiC Bi-Directional FETs (BiDFETs) with integrated JBS diodes in a 6-inch commercial foundry for use in matrix converters. The fabricated BiDFETs support high voltage (>1.2 kV) in the first and third quadrants. They exhibit very low on-resistance of 50 mΩ in the on-state in both quadrants when the 20 V gate bias is applied to both gates, allowing conduction of 20 A with 1 V drop. Fully gate voltage controlled output characteristics are also confirmed in both quadrants.
A research program for the development of a 10.6 micron HgCdTe photodiode/GaAs field effect transistor amplifier package for use at cryogenic temperatures (77k). The photodiode/amplifier module achieved a noise equivalent power per unit bandwidth of 5.7 times 10 to the 20th power W/Hz at 2.0 GHz. The heterodyne sensitivity of the HgCdTe photodiode was improved by designing and building a low noise GaAs field effect transistor amplifier operating at 77K. The Johnson noise of the amplifier was reduced at 77K, and thus resulted in an increased photodiode heterodyne sensitivity.
The development of transistor architectures, evolving from 2D planar metal-oxide-semiconductor field-effect transistors (MOSFETs) to FinFETs and then to gate-all-around nanowire (GAANW) FETs, plays a crucial role in downscaling technology nodes in the semiconductor industry. This perspective reviews the concept of MOSFETs and summarizes this historical development with particular emphasis on GAANW transistors due to their importance in next-generation technology for nodes below 3 nm. Specifically, the concept of GAANW transistors and their advantages over planar and FinFET devices for further scaling are presented, along with a discussion of their transition from early conceptual ideas to laboratory demonstrations and, ultimately, industrial adoption. Furthermore, potential solutions, such as complementary FETs (CFETs) and 2D semiconductor-based FETs, and their associated challenges for the future generation, known as the Angstrom Era, are discussed in a technological roadmap. In conclusion, this perspective may inspire both industry and academia in future research directions for realizing the Angstrom Era.
Contained within is the Final report of a Phase 1 SBIR program to develop AlGaN channel junction field effect transistors (JFET). The report summarizes our work to design, deposit, and fabricate JFETS using molecular beam epitaxy growth AlGaN. Nitride growth is described using a RF atomic nitrogen plasma source. Processing steps needed to fabricate the device such as ohmic source-drain contacts, reactive ion etching, gate formation, and air bride fabrication are documented. SEM photographs of fabricated power FETS are shown. Recommendations are made to continue the effort in a Phase 2 Program.
Equivalent circuit and modified and approximate models for metal oxide semiconductor-field effect transistor devices, and adaptability to computerized circuit design
Analytical calculations corroborated by the finite element modeling show that thin films of Van der Waals ferrielectrics covered by a 2D-semiconductor are promising candidates for the controllable reduction of the dielectric layer capacitance due to the negative capacitance (NC) effect emerging in the thin films. The NC state is conditioned by energy-degenerated poly-domain states of the ferrielectric polarization induced in the films under incomplete screening conditions in the presence of a dielectric layer. Calculations performed for the FET-type heterostructure “ferrielectric CuInP 2 S 6 film—2D-MoS 2 single-layer—SiO 2 dielectric layer” reveal the pronounced size effect of the multilayer capacitance. Derived analytical expressions for the electric polarization and multilayer capacitance allow to predict the thickness range of the dielectric layer and ferrielectric film for which the NC effect is the most pronounced in various Van der Waals ferrielectrics, and the corresponding subthreshold swing becomes much less than the Boltzmann's limit. Obtained results can be useful for the size and temperature control of the NC effect in the steep-slope ferrielectric FETs.
Unity gain buffer amplifier with a Field Effect Transistor /FET/ differential input stage responds much faster than bipolar transistors when operated at low current levels. The circuit uses a dual FET in a unity gain buffer amplifier having extremely high input impedance, low bias current requirements, and wide bandwidth.
Experimental device has low noise and high uniformity. Infrared imaging device combines array of InSb photodetectors with array of silicon field-effect-transistor switches. InSb chip forms roof over Si chip, each InSb detector cell engaging indium bump on corresponding Si switch cell below it. FET switches in 128-by-128 array turn on in sequence, read out charges on 128-by-128 array of photodetectors and multiplex them in serial output that represents pattern of light on array of photodetectors. Useful in sensitive infrared cameras for astronomy, medicine, inspection, and military surveillance. Reads out image data at rates up to 10 MHz and expands to 256-by-256 array.
Properties of second-gate electrode of MOS-FET AND application as voltage-controlled integrator
The development of a push-pull frequency-modulated oscillator employing field-effect transistors is described. The advantages of field-effect transistors for use in a frequency-stable oscillator are presented. Linearization of the frequency deviation was accomplished by utilizing the square-law characteristic of an FET used as a modulating amplifier. The push-pull oscillator model produced a linear frequency deviation of more than 10 MHz at a center frequency of approximately 100 MHz. Output power is within 0.6 db of a nominal +8.5 dBm over the desired frequency range, and the modulation bandwidth is dc to 10 MHz. Frequency variation with temperature after compensation with a negative-temperature-coefficient capacitor is within + or - 0.05% from 0 to 60 C.
An integrated, optoelectronic, variable thresholding neuron implemented monolithically in GaAs integrated circuit and exhibiting high differential optical gain and low power consumption is presented. Two alternative embodiments each comprise an LED monolithically integrated with a detector and two transistors. One of the transistors is responsive to a bias voltage applied to its gate for varying the threshold of the neuron. One embodiment is implemented as an LED monolithically integrated with a double heterojunction bipolar phototransistor (detector) and two metal semiconductor field effect transistors (MESFET's) on a single GaAs substrate and another embodiment is implemented as an LED monolithically integrated with three MESFET's (one of which is an optical FET detector) on a single GaAs substrate. The first noted embodiment exhibits a differential optical gain of 6 and an optical switching energy of 10 pJ. The second embodiment has a differential optical gain of 80 and an optical switching energy of 38 pJ. Power consumption is 2.4 and 1.8 mW, respectively. Input 'light' power needed to turn on the LED is 2 micro-W and 54 nW, respectively. In both embodiments the detector is in series with a biasing MESFET and saturates the other MESFET upon detecting light above a threshold level. The saturated MESFET turns on the LED. Voltage applied to the biasing MESFET gate controls the threshold.
An analysis is presented for the voltage versus frequency characteristics of a varactor modulated VHF voltage controlled oscillator in which the frequency deviation is linearized by using the nonlinear characteristics of a field effect transistor as a signal amplifier. The equations developed are used to calculate the oscillator output frequency in terms of pertinent circuit parameters. It is shown that the nonlinearity exponent of the FET has a pronounced influence on frequency deviation linearity, whereas the junction exponent of the varactor controls total frequency deviation for a given input signal. A design example for a 250 MHz frequency modulated oscillator is presented.
Test were conducted to measure the performance of the 20-GHz solid state, proof-of-concept amplifier. The amplifier operates over the 17.7 to 20.2-GHz frequency range and uses high power gallium arsenide field effect transistors. The amplifier design and test methods are briefly described. NASA and contractor performance data are compared.
Future high capacity satellite communication systems require signal processing on board satellites. The on-board signal processing includes switching of RF signals between multiple antennas to provide interconnection between the uplink and downlink beams. This paper describes the development of a dynamic switch matrix for a TDMA satellite switching system to be used in the next generation communications satellites. In this paper, a dynamic switch matrix, which includes the microwave switch matrix, the distribution control unit and the timing source, will be described. Several different microwave switch matrix architectures and switching devices were evaluated and compared. A unique coupler crossbar switch matrix architecture with dual-gate field effect transistor as switching element was developed. Experimental results of both microwave switch matrix (MSM) and distribution control unit (DCU) are presented. These test results verify the MSM with coupler crossbar architecture and dual-gate FET as switching element will meet the future SS-TDMA system requirements. Finally, the reliability of the dynamic switch matrix is addressed. The analysis shows reliability of 0.9981 for 7 year space operation can be achieved for the designed dynamic switch matrix.
The end of Dennard scaling, which facilitated proportional increases in computing power without added energy costs until the mid-2000s, has underscored the urgent need for innovative semiconductor devices that can enhance energy efficiency. Tunnel field-effect transistors (TFETs) have emerged as promising candidates to surpass the energy efficiency of conventional metal oxide semiconductor field-effect transistors (MOSFETs). Unlike MOSFETs, which rely on thermionic emission to overcome the source-channel potential barrier, TFETs operate through quantum tunneling, potentially enabling sub-60 mV dec −1 subthreshold swing (SS) for low-voltage operation. However, lateral TFETs have faced challenges in achieving adequate on-state current (I ON ) and a broad SS operation window, limiting their practical utility. This review article advocates for areal TFETs, which utilize face-to-face tunnel junctions that ideally offer step-function current turn-on characteristics and allow I ON to scale with device area rather than width. We highlight recent advancements in integrating 2D materials into tunneling structures, which could facilitate efficient band-to-band tunneling through atomically thin layers, while addressing challenges of gate field screening. We then discuss the nearer-term prospects of epitaxial areal TFETs comprising III–V compound semiconductors and group-IV semiconductors based on recent experimental progress. The review examines both quantum mechanical and semiclassical modeling approaches for TFETs, including techniques to reduce the computational complexity. The article delves into ongoing challenges in material synthesis, interface engineering, device fabrication, and integration pathways, concluding with recommendations for future research directions to overcome the fundamental power density limitations of conventional transistor technology.