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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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14 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

In-pixel AI for lossy data compression at source for X-ray detectors

Integrating neural networks for data compression directly in the Read-Out Integrated Circuits (ROICs), i.e. the pixelated front-end, would result in a significant reduction in off-chip data transfer, overcoming the I/O bottleneck. Our ROIC test chip (AI-In-Pixel-65) is designed in a 65 nm Low Power CMOS process for the readout of pixelated X-ray detectors. Each pixel consists of an analog front-end for signal processing and a 10b analog-to-digital converter operating at 100KSPS. Here, we compare two non-reconfigurable techniques, Principal Component Analysis (PCA) and an AutoEncoder (AE) as lossy data compression engines implemented within the pixelated area. The PCA algorithm achieves 50$×$ compression, adds one clock cycle latency, and results in a 21% increase in the pixel area. The AE achieves 70$×$ compression, adds 30 clock cycle latency, and results in a similar area increase.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS2012

Analog bus driver and multiplexer

For a source-follower signal chain, the ohmic drop in the selection switch causes unacceptable voltage offset, non-linearity, and reduced small signal gain. For an op amp signal chain, the required bias current and the output noise rises rapidly with increasing the array format due to a rapid increase in the effective capacitance caused by the Miller effect boosting up the contribution of the bus capacitance. A new switched source-follower signal chain circuit overcomes limitations of existing op-amp based or source follower based circuits used in column multiplexers and data readout. This will improve performance of CMOS imagers, and focal plane read-out integrated circuits for detectors of infrared or ultraviolet light.

Pain, Bedabrata↗
NASA NTRS2011

n-B-pi-p Superlattice Infrared Detector

A specially designed barrier (B) is inserted at the n-pi junction [where most GR (generation-recombination) processes take place] in the standard n-pi-p structure to substantially reduce generation-recombination dark currents. The resulting n-Bpi- p structure also has reduced tunneling dark currents, thereby solving some of the limitations to which current type II strained layer superlattice infrared detectors are prone. This innovation is compatible with common read-out integrated circuits (ROICs).

Ting, David Z.↗
NASA NTRS2014

HgCdTe e-APD Detector Arrays with Single Photon Sensitivity for Space Lidar Applications

A multi-element HgCdTe electron initiated avalanche photodiode (e-APD) array has been developed for space lidar applications. The detector array was fabricated with 4.3-μm cutoff HgCdTe which covered a spectral response from 0.4 to 4.3 μm. We have characterized a 4x4 detector array with 80 μm square elements and an integrated custom cryogenic silicon read-out integrated circuit (ROIC). The device operated at 77K inside a small closed-cycle Dewar. Measurements showed a unity gain quantum efficiency of about 90% at 1.55 μm. The bulk dark current of the HgCdTe e-APD at 77K was less than 50,000 input referred electrons/s at 12 V APD bias where the APD gain was 620 and the measured noise equivalent power (NEP) was 0.4 fW/Hz1/2. The electrical bandwidth of the ROIC was about 6 MHz, which was chosen to match the laser pulse width of our CO2 lidar. Even with the relatively low bandwidth, the high APD gain and low dark current enabled the device to detect single photon events. Because the APD was biased below the break-down voltage, the detector output was linear with the input optical signal and there was no dead-time and afterpulsing. A new series of HgCdTe e-APDs are being developed with a much wider bandwidth ROIC and higher gain HgCdTe e-APD array, which is expected to give a much better performance in linear mode photon counting applications.

HgCdTe↗
NASA NTRS2020

Proton Radiation Effects on HgCdTe Avalanche Photodiode Detectors

Space radiation damage and proton induced transient effects were evaluated on 4.4 μm cutoff HgCdTe avalanche photodiode (APD) arrays developed by Leonardo DRS. Device performances as a function of total dose up to 100 krad (Si) were measured with ~60 MeV protons on 3 types of APD samples: 4x4 pixel APD fanout arrays with and without connection to a read-out integrated circuit (ROIC), and a 2x8 pixel photon counting APD focal plane array (FPA). A gamma-ray test was also conducted to study ionization effects. Both APD arrays exhibited a small decrease in the quantum efficiency and a linear increase in the dark current with the proton fluence. The 2x8 pixel photon counting FPA also exhibited an increase in the dark count rate with proton dose. After the proton irradiation and an overnight room temperature warm-up, the APD dark currents at 80 K increased significantly in both types of APD arrays. All radiation damage to these HgCdTe APD arrays annealed out after baking them at >85 °C for several hours. Transient protons through the devices were found to cause large pulses at the detector output but recover within 1 μs.

Xiaoli Sun↗
NASA NTRS2017

Kilo-Pixel Miniaturized Thermal Imagers based on Advanced Thermoelectrics

This work presents a novel focal plane module architecture based on kilo-pixel arrays able to image from UV to far-infrared scenes. The focal plane arrays are integrated with custom-made, chopper-stabilized read-out integrated circuits into sub-assembly modules to be mounted on the optical telescope of the instrument.

Johnson, William↗
NASA NTRS2016

Development and Performance of a Suprathermal Electron Spectrometer to Study Auroral Precipitations

The design, development, and performance of Medium-energy Electron SPectrometer (MESP), dedicated to the in situ observation of suprathermal electrons in the auroral ionosphere, are summarized in this paper. MESP employs a permanent magnet filter with a light tight structure to select electrons with proper energies guided to the detectors. A combination of two avalanche photodiodes and a large area solid-state detector (SSD) provided 46 total energy bins (1 keV resolution for 3-20 keV range for APDs, and 7 keV resolution for greater than 20 keV range for SSDs). Multi-channel ultra-low power application-specific integrated circuits are also verified for the flight operation to read-out and analyze the detector signals. MESP was launched from Poker F1at Research Range on 3 March 2014 as a part of ground-to-rocket electrodynamics-electrons correlative experiment (GREECE) mission. MESP successfully measured the precipitating electrons from 3 to 120 keV in 120-ms time resolution and characterized the features of suprathermal distributions associated with auroral arcs throughout the flight. The measured electrons were showing the inverted-V type spectra, consistent with the past measurements. In addition, investigations of the suprathermal electron population indicated the existence of the energetic non-thermal distribution corresponding to the brightest aurora.

Ogasawara, Keiichi↗
DOE OSTI2024

A Cryogenic readout integrated circuit with analog pile-up and in-Pixel ADC for high frame rate Skipper CCD-in-CMOS Sensors

The Skipper CCD-in-CMOS Parallel Read-Out Circuit V2 (SPROCKET2) is designed to enable high frame rate readout of Skipper CCD-in-CMOS image sensors. The SPROCKET2 pixel is fabricated in a 65 nm CMOS process and occupies a 60$\mu$m $\times$ 60$\mu$m footprint. SPROCKET2 is intended to be heterogeneously integrated with a pixelated Skipper CCD-in-CMOS sensor, such that one readout pixel is connected to a multiplexed array of 16 active image sensor pixels, to match their spatial geometry. Our design benefits from the Skipper CCD-in-CMOS sensor's non-destructive readout capability to achieve exceptionally low noise through multi-sampling and averaging while optimizing for total power consumption. The pixel readout utilizes correlated double sampling to minimize 1/f noise and includes "pile-up" of ten successive samples in the analog domain before digitizing at a rate of 66.7 ksps. Measurement results of in-pixel serial SAR ADC show DNL and INL of ~0. 44 LSB and 0.58 LBS respectively. A large area array of 20,000 SPROCKET2 ADC pixels (multiplexed 1:16 to 320,000 sensor pixels) is currently under test. By reading out data over a 10 Gbps optical link, this pixel design enables a frame rate of $\sim$ 4 kfps for large sensing areas with minimal sensing deadtime. In the highest gain mode, the pixelated ADC has an input-referred resolution of 10$\mu$V with a simulated power consumption of 50$\mu$W. The pixel operates with constant current draw to minimize power-rail crosstalk.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS2007

Design of Low Power CMOS Read-Out with TDI Function for Infrared Linear Photodiode Array Detectors

A new low voltage CMOS infrared readout circuit using the buffer-direct injection method is presented. It uses a single supply voltage of 1.8 volts and a bias current of 1uA. The time-delay integration technique is used to increase the signal to noise ratio. A current memory circuit with faulty diode detection is used to remove dark current for background compensation and to disable a photodiode in a cell if detected as faulty. Simulations are shown that verify the circuit that is currently in fabrication in 0.5ym CMOS technology.

Vizcaino, Paul↗
DOE OSTI2023

A Cryogenic Readout IC with 100 KSPS in-Pixel ADC for Skipper CCD-in-CMOS Sensors

The Skipper CCD-in-CMOS Parallel Read-Out Circuit (SPROCKET) is a mixed-signal front-end design for the readout of Skipper CCD-in-CMOS image sensors. SPROCKET is fabricated in a 65 nm CMOS process and each pixel occupies a 50$\mu$m $\times$ 50$\mu$m footprint. SPROCKET is intended to be heterogeneously integrated with a Skipper-in-CMOS sensor array, such that one readout pixel is connected to a multiplexed array of nine Skipper-in-CMOS pixels to enable massively parallel readout. The front-end includes a variable gain preamplifier, a correlated double sampling circuit, and a 10-bit serial successive approximation register (SAR) ADC. The circuit achieves a sample rate of 100 ksps with 0.48 $\mathrm{e^-_{rms}}$ equivalent noise at the input to the ADC. SPROCKET achieves a maximum dynamic range of 9,000 $e^-$ at the lowest gain setting (or 900 $e^-$ at the lowest noise setting). The circuit operates at 100 Kelvin with a power consumption of 40 $\mu W$ per pixel. A SPROCKET test chip was submitted in September 2022, and test results will be presented at the conference.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS1998

Numerical Examination of Silicon Avalanche Photodiodes Operated in Charge Storage Mode

The behavior of silicon-based avalanche photodiodes (APD's) operated in the charge storage mode is examined. In the charge storage mode, the diodes are periodically biased to a sub-breakdown voltage and then open-circuited. During this integration period, photo-excited and thermally generated carriers are accumulated within the structure. The dynamics of this accumulation and its effects upon the avalanching of the diode warrants a detailed, fully numerical analysis. The salient features of this investigation include device sensitivity to the input photo-current including the self-quenching effect of the diode and its limitations in sensing low light levels, the dependence of the response on the bulk lifetime and hence on the generation current within the device, the initial gain, transient response, dependence of the device uniformity upon performance, and the quantity of storable charge within the device. To achieve these tasks our device simulator, STEBS-2D, was utilized. A modified current-controlled boundary condition is employed which allows for the simulation of the isolated diode after the initial reset bias has been applied. With this boundary condition, it is possible to establish a steady-state voltage on the ohmic contact and then effectively remove the device from the external circuit while still including effects from surface recombination, trapped surface charge, and leakage current from the read-out electronics.

Parks, Joseph W., Jr.↗
DOE OSTI2021

Overhaul and installation of the ICARUS-T600 liquid argon TPC electronics for the FNAL Short Baseline Neutrino program

The ICARUS T600 liquid argon (LAr) time projection chamber (TPC) underwent a major overhaul at CERN in 2016–2017 to prepare for the operation at FNAL in the Short Baseline Neutrino (SBN) program. This included a major upgrade of the photo-multiplier system and of the TPC wire read-out electronics. The full TPC wire read-out electronics together with the new wire biasing and interconnection scheme are described. The design of a new signal feed-through flange is also a fundamental piece of this overhaul whose major feature is the integration of all electronics components onto the signal flange. Initial functionality tests of the full TPC electronics chain installed in the T600 detector at FNAL are also described.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2026

A scalable superconducting nanowire memory array with row–column addressing

Scalable superconducting memory is required for the development of low-energy superconducting computers and fault-tolerant quantum computers. Conventional superconducting logic-based memory cells possess a large footprint that limits scaling; nanowire-based superconducting memory cells, although more compact, have high error rates, which hinders integration into large arrays. Here we report a 4 × 4 superconducting nanowire memory array that is designed for scalable row–column operations and has a functional density of 2.6 Mbit cm −2 . Each memory cell is based on a nanowire loop consisting of two temperature-dependent superconducting switches and a variable kinetic inductor. The arrays operate at 1.3 K, where we implement and characterize multiflux quanta state storage and destructive read-out. By optimizing the write- and read-pulse sequences, we minimize bit errors and maximize operating margins. We achieve a minimum bit error rate of 10 −5 . Here, we also use circuit-level simulations to understand the memory cell’s dynamics, performance limits and stability under varying pulse amplitudes.

Electrical and electronic engineering↗
NASA NTRS1987

Advanced Components for Spaceborne Infrared Astronomy

Basic improvements in the technology of low noise read-out systems for low background detectors were demonstrated. Using discrete JFET integrating amplifiers at their optimum temperature of 55 K, read noise less than 7.5 electrons in 128 seconds of integration was obtained. Two models of single channel integrators are now available, the JF-77 for use between 50 and 80 K and the JF-4 for lower temperatures. A 1 x 15 linear array of complete integrators on a single integrated circuit was developed and will be made available in the near future. The successful operation of a superconducting stepper motor was demonstrated. The motor shows a three fold increase in torque over conventional motors operating at room temperature. The success of the motor stems from the use of superconducting coils in conjunction with developments in bearings for cryogenic use, rare-earth rotors, and motor cooling techniques. The current state of development will allow the rapid development of motors optimized for specific applications. An electronic switch capable of resetting cooled JFET integrating amplifiers was developed. The JFET integrating amplifiers that use this switch have demonstrated read noise of less than 10 electrons. The JFET reset device exhibits an extremely high open impedance and low leakage current. Capacitance is sufficiently low so as not to impair amplifier sensitivity. The effects of transient switching charges are minimized by a compensation technique and variable transient current problems inherent to devices of this type are overcome by external circuity.

Davidson, Arnold W.↗