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At least 19 records

A summary of JPL single event upset test data from May 1982, through January 1984

A summary of single event upset data for 42 device types (including RAMs, 4-bit slices, microprocessors, 4-bit counters, and flip-flops) studied at 11 different accelerator tests (performed chiefly with the Berkeley 88-inch cyclotron and the Cal Tech Van de Graaff) is presented. All bipolar and NMOS RAMs were found to be SEU sensitive, some with very low LET thresholds. Some CMOS or CMOS/SOS RAMs were hard; and the CMOS microprocessors were hard, but the bipolar and NMOS microprocessors were soft. Several devices were found to exhibit a cross section that depends strongly on LET, even when the LET is well above the LET threshold. A ranking of hardness is presented for the logic devices tested.

Nichols, D. K.

Independent Single Event Upset Testing of the Xilinx V5QV

In this presentation, we provide a brief glimpse at preliminary single event test results taken from two years of testing of the Xilinx V5QV Field Programmable Gate Array (FPGA). This presentation includes an overview of test philosophy and implementation.

Single Event Upset Testing

A guideline for heavy ion radiation testing for Single Event Upset (SEU)

A guideline for heavy ion radiation testing for single event upset was prepared to assist new experimenters in preparing and directing tests. How to estimate parts vulnerability and select an irradiation facility is described. A broad brush description of JPL equipment is given, certain necessary pre-test procedures are outlined and the roles and testing guidelines for on-site test personnel are indicated. Detailed descriptions of equipment needed to interface with JPL test crew and equipment are not provided, nor does it meet the more generalized and broader requirements of a MIL-STD document. A detailed equipment description is available upon request, and a MIL-STD document is in the early stages of preparation.

Nichols, D. K.

Single event upset susceptibility testing of the Xilinx Virtex II FPGA

Heavy ion testing of the Xilinx Virtex IZ was conducted on the configuration, block RAM and user flip flop cells to determine their single event upset susceptibility using LETs of 1.2 to 60 MeVcm^2/mg. A software program specifically designed to count errors in the FPGA is used to reveal L1/e values and single-event-functional interrupt failures.

FPGA Xilinx Virtex static test single event upset

Single event upset suspectibility testing of the Xilinx Virtex II FPGA

Heavy ion testing of the Xilinx Virtex II was conducted on the configuration, block RAM and user flip flop cells to determine their static single-event upset susceptibility using LETs of 1.2 to 60 MeVcm^2/mg. A software program specifically designed to count errors in the FPGA was used to reveal L1/e, values (the LET at which the cross section is l/e times the saturation cross-section) and single-event functional-interrupt failures.

FPGA Virtex II SEU

More About Laser Scanner Tests For Single-Event Upsets

Two reports describe preliminary theoretical and experimental studies based on method described in "Laser Scanner Tests For Single-Event Upsets" (NPO-18216). Laser-scan and heavy-ion data found correlated within factor of two. Method of testing for single-event upsets intended to overcome disadvantages of, complement, and/or substitute for more-expensive cyclotron-testing method, which does not provide spatial resolution.

Kim, Quiesup

Single event upset (SEU) testing at JPL

It is believed that the increase in SEUs with more modern devices may have serious consequences for future space missions. The physics behind an SEU is discussed as well as SEU test philosophy and equipment, and testing results. It is concluded that the problem may be ameliorated by careful device selection and the use of redundancy or error correction.

Coss, James R.

Laser Scanner Tests For Single-Event Upsets

Microelectronic advanced laser scanner (MEALS) is opto/electro/mechanical apparatus for nondestructive testing of integrated memory circuits, logic circuits, and other microelectronic devices. Multipurpose diagnostic system used to determine ultrafast time response, leakage, latchup, and electrical overstress. Used to simulate some of effects of heavy ions accelerated to high energies to determine susceptibility of digital device to single-event upsets.

Kim, Quiesup

Charge collection at large angles of incidence

Charge collection exhibited by p-n junctions, which have at least one small dimension, deviates from the geometric assumptions commonly used in SEU (single event upset) testing. The amount of charge collected did not increase with the secant of the angle of incidence. The number of events under the peak in the charge collection spectrum did not decrease as the cosine of the angle of incidence. Both the position of the peak and the number of events under the peak measured at a given angle of incidence depended upon which symmetry axis of the device was chosen to be the axis of rotation.

Mcnulty, P. J.

NEPP Update of Independent Single Event Upset Field Programmable Gate Array Testing

This presentation provides a NASA Electronic Parts and Packaging (NEPP) Program update of independent Single Event Upset (SEU) Field Programmable Gate Array (FPGA) testing including FPGA test guidelines, Microsemi RTG4 heavy-ion results, Xilinx Kintex-UltraScale heavy-ion results, Xilinx UltraScale+ single event effect (SEE) test plans, development of a new methodology for characterizing SEU system response, and NEPP involvement with FPGA security and trust.

Field Programmable Gate Array (FPGA); Triple Modul

Testing Electronic Devices for Single-Event Upset

Report prepared describes equipment and summarizes both pretest and onsite procedures for testing of digital electronic devices for susceptibility to single-event upset. Term "single-event upset" denotes variety of temporary or permanent bit flips or latchup induced by single particles of ionizing radiation. Vacuum chamber houses device under test while exposed to ion beam. Vacuum chamber and associated equipment must be brought to ion-beam facility for test.

Nichols, D. K.