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At least 19 records

Physics-based simulation of EM and SM in TSV-based 3D IC structures

Evolution of stresses in through-silicon-vias (TSVs) and in the TSV landing pad due to the stress migration (SM) and electromigration (EM) phenomena are considered. It is shown that an initial stress distribution existing in a TSV depends on its architecture and copper fill technology. We demonstrate that in the case of proper copper annealing the SM-induced redistribution of atoms results in uniform distributions of the hydrostatic stress and concentration of vacancies along each segment. In this case, applied EM stressing generates atom migration that is characterized by kinetics depending on the preexisting equilibrium concentration of vacancies. Stress-induced voiding in TSV is considered. EM induced voiding in TSV landing pad is analyzed in details.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Thermomechanical characterization and modeling for TSV structures

Continual scaling of devices and on-chip wiring has brought significant challenges for materials and processes beyond the 32-nm technology node in microelectronics. Recently, three-dimensional (3-D) integration with through-silicon vias (TSVs) has emerged as an effective solution to meet the future technology requirements. Among others, thermo-mechanical reliability is a key concern for the development of TSV structures used in die stacking as 3-D interconnects. This paper presents experimental measurements of the thermal stresses in TSV structures and analyses of interfacial reliability. The micro-Raman measurements were made to characterize the local distribution of the near-surface stresses in Si around TSVs. On the other hand, the precision wafer curvature technique was employed to measure the average stress and deformation in the TSV structures subject to thermal cycling. To understand the elastic and plastic behavior of TSVs, the microstructural evolution of the Cu vias was analyzed using focused ion beam (FIB) and electron backscattering diffraction (EBSD) techniques. Furthermore, the impact of thermal stresses on interfacial reliability of TSV structures was investigated by a shear-lag cohesive zone model that predicts the critical temperatures and critical via diameters.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Design for reliability of BEoL and 3-D TSV structures – A joint effort of FEA and innovative experimental techniques

Copper-TSVs for 3D-IC-integration generate novel challenges for reliability analysis and prediction, e.g. the need to master multiple failure criteria for combined loading including residual stress, interface delamination, cracking and fatigue issues. So, the thermal expansion mismatch between copper and silicon leads to a stress situation in silicon surrounding the TSVs which is influencing the electron mobility and as a result the transient behavior of transistors. Furthermore, pumping and protrusion of copper is a challenge for Back-end of Line (BEoL) layers of advanced CMOS technologies already during manufacturing. These effects depend highly on the temperature dependent elastic-plastic behavior of the TSV-copper and the residual stresses determined by the electro deposition chemistry and annealing conditions. That’s why the authors pushed combined simulative/experimental approaches to extract the Young’s-modulus, initial yield stress and hardening coefficients in copper-TSVs from nanoindentation experiments, as well as the temperature dependent initial yield stress and hardening coefficients from bow measurements due to electroplated thin copper films on silicon under thermal cycling conditions. A FIB trench technique combined with digital image correlation is furthermore used to capture the residual stress state near the surface of TSVs. The extracted properties are discussed and used accordingly to investigate the pumping and protrusion of copper-TSVs during thermal cycling. Moreover, the cracking and delamination risks caused by the elevated temperature variation during BEoL ILD deposition are investigated with the help of fracture mechanics approaches.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

2.5D HI Packaging of the Power Converter using TSV interposer.

Abstract: Advantages of the 2.5D HI (Heterogeneous Integration) electronics packaging of the power electronics compared to PCB packaging will be presented. Current 2.5D packaging effort using TSV (Through Silicon Via) will be presented in terms of fabrication, microstructural analysis, reliability, and thermal simulation.

Chung, Hyunim↗

Laser Texturing of Magnetic Recording Media Final Report CRADA No. TSV-1298-96

The Commercial Laser Systems Group at LLNL developed a concept for patterning of computer magnetic recording discs. Magnetic recording media require texturing over areas designated for contact in order to minimize friction with data transducing heads. In fabricating a hard disk, an aluminum nickel-phosphorous substrate was polished to a specular finish then a mechanical means was used to roughen an annular area intended to be the head contact band. In a previous patent (US Patent 5,062,021) it was proposed that the focused output of a low power laser with short pulse length could be used to generate the textured pattern. However, the patterned area typically required 75,000 textured spots that needed to be rapidly (less than 10 seconds) printed with good uniformity. A means to achieve the accurate placement and uniform profile, as well as a meaningfully rapid process time, was not discussed in the referenced patent. The LLNL team devised a system that could rapidly and inexpensively accomplish the texturing.

36 MATERIALS SCIENCE↗

Multilayer Foil Manufacturability Final Report CRADA No. TSV-1246-96

The work performed under this CRADA was based on developments in multilayer technology made at Lawrence Livermore National Laboratory (LLNL) that enable advanced pyrotechnic material fabrication. We applied our understanding of the performance, composition, and microstructure of these materials to engineering design of application specific structures. The purpose of the project was to assess the feasibility of LLNL’s multilayer technology for application to large scale manufacturing of these advanced pyrotechnic materials for the automobile industry; address any manufacturing limitations; and propose approaches to improve manufacturability. Another purpose was to address issues associated with the design of application-specific materials for their subsequent manufacture, including the establishment of general guidelines for such a manufacturability assessment.

21 SPECIFIC NUCLEAR REACTORS AND ASSOCIATED PLANTS↗

Synchrotron X-Ray Microdiffraction Investigation of Scaling Effects on Reliability for Through-Silicon Vias for 3-D Integration

Synchrotron x-ray microdiffraction has been applied to TSV characterization in various studies for nondestructive inspection with submicron resolution due to its high beam intensity and penetration depth. Here, the application of this technique to TSV investigations is examined and the correlation of the plastic deformation to the microstructure and extrusion behavior along with the effect of TSV dimensional scaling is examined. It is shown that the variability of the copper microstructure and resulting TSV behavior requires a larger number of samples in order to report statistically significant observations. The role of the microstructure in creating statistical scatter is demonstrated through microdiffraction measurements of grain orientation correlated with the observed peak widening, which shows that degraded TSV reliability is largely due to the high elastic anisotropy of copper. After taking the statistical variations into account, the scaling effect was clearly observed, with larger plastic deformation in 2μm diameter TSVs than in 5μm diameter TSVs consistent with microstructure variations. This is confirmed by TSV extrusion measurements, which show that the magnitude and statistical spread of the via extrusion for the 2μm diameter TSVs is higher than that of the 5μm diameter TSVs. These findings, confirmed by thermomechanical simulation, demonstrate first that large sample sizes are required in copper TSV investigations due to high variability, which is not improved with scaling.

36 MATERIALS SCIENCE↗

Welded and Hydrogen Charged Zircaloy-4 and Welded Stainless Steel 347 Property Data and Microstructures for the Target Solution Vessel and Support Lines of SHINE

SHINE Medical Technologies is developing a facility that will produce molybdenum-99 for medical isotope procedures. As part of this facility, a metal tank, called the target solution vessel (TSV), will hold a uranyl sulfite solution. The TSV must withstand neutron irradiation near room temperature and potential corrosion from the aqueous solution. The large cylindrical TSV will be fabricated by welding and will have numerous pipes and connections also attached via welding. The vessel and those pipes will have varying thicknesses so both gas tungsten arc welding (GTAW) and flux-cored arc welding (FCAW) will be necessary to fabricate different sections. The original material under consideration for the TSV was Zircaloy-4 (Zry-4), but it is known to form a hydride which can degrade its mechanical properties. Thus, some investigation here is focused on the effects of hydrogen uptake in the Zry-4. Additionally, the alternative material being considered is AISI 347, a stainless steel. Both materials have little existing data for their neutron irradiation behavior below 100°C, and both have open questions on the weld behavior under neutron irradiation. Testing has focused on characterizing their weld properties with tensile tests and performing neutron irradiation of samples in the High Flux Isotope Reactor (HFIR) at Oak Ridge National Laboratory (ORNL).

07 ISOTOPE AND RADIATION SOURCES↗

Synchrotron-based measurement of the impact of thermal cycling on the evolution of stresses in Cu through-silicon vias

One of the main causes of failure during the lifetime of microelectronics devices is their exposure to fluctuating temperatures. In this work, synchrotron-based X-ray micro-diffraction is used to study the evolution of stresses in copper through-silicon via (TSV) interconnects, “as-received” and after 1000 thermal cycles. For both test conditions, significant fluctuations in the measured normal and shear stresses with depth are attributed to variations in the Cu grain orientation. Nevertheless, the mean hydrostatic stresses in the “as-received” Cu TSV were very low, at (16 ± 44) MPa, most likely due to room temperature stress relaxation. In contrast, the mean hydrostatic stresses along the entire length of the Cu TSV that had undergone 1000 thermal cycles (123 ± 37) MPa were found to be eight times greater, which was attributed to increased strain-hardening. The evolution in stresses with thermal cycling is a clear indication that the impact of Cu TSVs on front-end-of-line (FEOL) device performance will change through the lifetime of the 3D stacked dies, and ought to be accounted for during FEOL keep-out-zone design rules development.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

High Density Chip Interconnect Technology Using High Density Glass Interposers

Demands for high density and high speed interconnect solutions are not satisfied by current technology offerings. Platforms such as printed circuit boards (PCBs), ceramic substrates and silicon interposers don’t provide the small form factor nor the I/O density to support 5G or 1Tbps gigabit ethernet solutions. Current solutions also don’t support die to die assembly with integrated tiled solutions for wide area and fanout solutions for lager data and signal processing. A solution with through vias provides an order of magnitude or smaller density supporting much higher density attach and assembly By fabricating a very fine pitch metal filled through glass via solution it’s possible to deliver the necessary improvements in performance, reliability, even higher data speed rates with smaller area and much denser geometries. There are a number of opportunities across a wide variety of industries for through glass interposers as they become the replacement for printed circuit boards (PCBs) and ceramic substrates. The broad array of opportunities include renewable energy, medical electronics (ME), defense electronics (DE)/space and consumer electronics (CE), but likely will impact every industry and market segment. Compared to PCBs, through glass via (TGV) solutions provide the next generation platform for semiconductor assembly improvements. The ability to generate lines, spaces, trenches and vias similar to wafer level geometries delivers wired solutions one to two orders of magnitude smaller than traditional organic PCB and ceramic substrate offerings. Higher density connections also include the thru vias that connect multiple metal layers, fanout. It’s possible to deliver filled metal vias that are 20um diameter with much tighter pitch than can be offered with PCB. Our goal is to provide 20um diameter and smaller via, 50um and smaller pitch, and aspect ratios at 25:1 and greater with hermetically metal filled vias. The goal of CVI is to replace or eliminate PCBs, ceramic substrate and through silicon vias (TSV) providing a glass interposer with metal filled, fiber plugged and/or optional wireless interconnectivity. The end plan is to deliver a glass substrate platform that provides improved electrical performance, versatility, inertness, and much improved cost and cycle time (development, drawing, and delivery) to performance in the form of small millimeter sized substrates or full 8” wafer substrates. Glass delivers an improvement over silicon thru vias (TSV) in the number of processing steps, cost, reliability and cycle time. In addition to metal plugged vias, our glass interposers are capable of fiber and antennae solutions providing two additional very high density and ultra-high speed data transfer capabilities.

36 MATERIALS SCIENCE↗

Through-silicon via-induced strain distribution in silicon interposer

Strain in silicon induced by Through-Silicon Via (TSV) integration is of particular interest in the frame of the integration of active devices in silicon interposer. Nano-focused X-ray beam diffraction experiments were conducted using synchrotron radiation to investigate the thermally induced strain field in silicon around copper filled TSVs. Measurements were performed on thinned samples at room temperature and during in situ annealing at 400 °C. In order to correlate the 2D strain maps with finite elements analysis, an analytical model was developed, which takes into account beam absorption in the sample for a given diffraction geometry. The strain field along the [335] direction is found to be in the 10{sup −5} range at room temperature and around 10{sup −4} at 400 °C. Simulations support the expected plastification in some regions of the TSV during the annealing step.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Low-temperature ({<=}200 Degree-Sign C) plasma enhanced atomic layer deposition of dense titanium nitride thin films

Titanium nitride (TiN) has been widely used in the semiconductor industry for its diffusion barrier and seed layer properties. However, it has seen limited adoption in other industries in which low temperature (<200 Degree-Sign C) deposition is a requirement. Examples of applications which require low temperature deposition are seed layers for magnetic materials in the data storage (DS) industry and seed and diffusion barrier layers for through-silicon-vias (TSV) in the MEMS industry. This paper describes a low temperature TiN process with appropriate electrical, chemical, and structural properties based on plasma enhanced atomic layer deposition method that is suitable for the DS and MEMS industries. It uses tetrakis-(dimethylamino)-titanium as an organometallic precursor and hydrogen (H{sub 2}) as co-reactant. This process was developed in a Veeco NEXUS Trade-Mark-Sign chemical vapor deposition tool. The tool uses a substrate rf-biased configuration with a grounded gas shower head. In this paper, the complimentary and self-limiting character of this process is demonstrated. The effects of key processing parameters including temperature, pulse time, and plasma power are investigated in terms of growth rate, stress, crystal morphology, chemical, electrical, and optical properties. Stoichiometric thin films with growth rates of 0.4-0.5 A/cycle were achieved. Low electrical resistivity (<300 {mu}{Omega} cm), high mass density (>4 g/cm{sup 3}), low stress (<250 MPa), and >85% step coverage for aspect ratio of 10:1 were realized. Wet chemical etch data show robust chemical stability of the film. The properties of the film have been optimized to satisfy industrial viability as a Ruthenium (Ru) preseed liner in potential data storage and TSV applications.

36 MATERIALS SCIENCE↗

ResStock™ v3.2.0 [SWR-19-15 and SWR-20-07]

The ResStock™ analysis tool was built on NREL's OpenStudio® platform, and is a project geared at modeling existing residential building stocks at national, regional, or local scales with a high-degree of granularity (e.g., one physics-based simulation model for every 200 dwelling units), using the EnergyPlus® simulation engine. Information about ComStock™, a sister tool for modeling the commercial building stock, can be found here: https://www.nrel.gov/buildings/comstock.html This repository contains: Housing characteristics of the U.S. residential building stock, in the form of conditional probability distributions stored as tab-separated value (.tsv) files. Comments at the bottom of each file document data sources and assumptions for each. A library of housing characteristic "options" that translate high-level characteristic parameters into arguments for OpenStudio measures, and which are referenced by the housing characteristic .tsv files and building energy upgrades defined in project definition files Project definition files: v2.3.0 and later: buildstockbatch YML files openable in any text editor v2.2.5 and prior: Project folder openable in PAT Unit-level OpenStudio Measures for automatically constructing OpenStudio Models of each representative dwelling unit model: v3.0.0 and later: OpenStudio-HPXML Measures v2.5.0 and prior: OpenStudio Measures Higher-level OpenStudio Measures for controlling simulation inputs and outputs This repository does not contain software for running ResStock simulations, which can be found as follows: Versions 2.3.0 and later only support the use of buildstockbatch for deploying simulations on high-performance or cloud computing. Version 2.3.0 also removed separate projects for single-family detached and multifamily buildings, in lieu of a combined project_national representing the U.S. residential building stock. See the changelog for more details. Versions 2.2.5 and prior support the use of the publicly available OpenStudio-PAT software as an interface for deploying simulations on cloud computing. Read the documentation for v2.2.5.

Horowitz, Scott↗

Centrifugal contactor operations for UREX process flowsheet. An update

The uranium extraction (UREX) process separates uranium, technetium, and a fraction of the iodine from the other components of the irradiated fuel in nitric acid solution. In May 2012, the time, material, and footprint requirements for treatment of 260 L batches of a solution containing 130 g-U/L were evaluated for two commercial annular centrifugal contactors from CINC Industries. These calculated values were based on the expected volume and concentration of fuel arising from treatment of a single target solution vessel (TSV). The general conclusions of that report were that a CINC V-2 contactor would occupy a footprint of 3.2 m 2 (0.25 m x 15 m) if each stage required twice the nominal footprint of an individual stage, and approximately 1,131 minutes or nearly 19 hours is required to process all of the feed solution. A CINC V-5 would require approximately 9.9 m 2 (0.4 m x 25 m) of floor space but would require only 182 minutes or ~ 3 hours to process the spent target solution. Subsequent comparison with the Modular Caustic Side Solvent Extraction Unit (MCU) at Savannah River Site (SRS) in October 2013 suggested that a more compact arrangement is feasible, and the linear dimension for the CINC V-5 may be reduced to about 8 m; a comparable reduction for the CINC V-2 yields a length of 5 m. That report also described an intermediate-scale (10 cm) contactor design developed by Argonne in the early 1980s that would better align with the SHINE operations as they stood in May 2012. In this report, we revisit the previous evaluation of contactor operations after discussions with CINC Industries and analysis of the SHINE process flow diagrams for the cleanup of the TSV, which were not available at the time of the first assessment.

11 NUCLEAR FUEL CYCLE AND FUEL MATERIALS↗

Evaluation of Zircaloy-4 Welding and Hydrogen Charging Effects for Use as the Structural Material for the Target Solution Vessel and Support Lines of SHINE

The subcritical hybrid intense neutron emitter (SHINE) is a proposed 99 Mo production facility to be constructed in the United States. It uses a deuterium (D) and tritium (T) fusion source to cause subcritical fission in an aqueous uranium solution, which is cycled to collect the 99 Mo products. The target solution vessel (TSV) is the container of the aqueous uranium solution, so it must remain structurally sound during operational exposure to water, fission products, neutrons, and hydrogen isotopes. The TSV will be large enough to require welding, so the exposure of joints to these same conditions must also be considered. The candidate material being investigated is Zircaloy-4. While Zircaloy-4 has a long history in the nuclear industry, it has primarily been used as fuel cladding at service temperatures of ~300°C. Zircaloy-4 must be evaluated for behavior under neutron irradiation at SHINE-relevant temperatures of <100°C. In this project, the effects of hydrogen, welding, and neutron irradiation at low temperatures are investigated.

36 MATERIALS SCIENCE↗

Method of forming through substrate vias (TSVs) and singulating and releasing die having the TSVs from a mechanical support substrate

Accessing a workpiece object in semiconductor processing is disclosed. The workpiece object includes a mechanical support substrate, a release layer over the mechanical support substrate, and an integrated circuit substrate coupled over the release layer. The integrated circuit substrate includes a device layer having semiconductor devices. The method also includes etching through-substrate via (TSV) openings through the integrated circuit substrate that have buried ends at or within the release layer including using the release layer as an etch stop. TSVs are formed by introducing one or more conductive materials into the TSV openings. A die singulation trench is etched at least substantially through the integrated circuit substrate around a perimeter of an integrated circuit die. The integrated circuit die is at least substantially released from the mechanical support substrate.

36 MATERIALS SCIENCE↗