Engineering topics

Hollis, B. R., Jr.

Publications and source records attributed to Hollis, B. R., Jr..

4 records

NASA NTRS1981

Liquid immersion apparatus for minute articles

Apparatus is disclosed for immersing minute integrated circuit chips in an etching solution in manufacturing integrated circuits during research and development. The apparatus includes a holder, having a handle and basket support for carrying a removable unitary basket and lid structure where fluid flow-through passages are formed, and wherein graduated openings in the handle provide for adjustably supporting the basket in a breaker at a desired level.

Belcher, J. G., Jr.↗

NASA NTRS1980

Multilayer metalization of MOS IC's

Modified ion-bombardment technqiue interconnects MOS circuit elements without affecting circuit parameters. Multilevel metalization involves: surface treatment prior to metalization; first metalization; metal pattern definition and photoresist removal; dielectric deposition; second metalization; and final dielectric deposition.

Bouldin, D. L.↗

NASA NTRS1979

Method of construction of a multi-cell solar array

The method of constructing a high voltage, low power, multicell solar array is described. A solar cell base region is formed in a substrate such as but not limited to silicon or sapphire. A protective coating is applied on the base and a patterned etching of the coating and base forms discrete base regions. A semiconductive junction and upper active region are formed in each base region, and defined by photolithography. Thus, discrete cells which are interconnected by metallic electrodes are formed.

Routh, D. E.↗

NASA NTRS1978

Multilevel metallization method for fabricating a metal oxide semiconductor device

An improved method is described of constructing a metal oxide semiconductor device having multiple layers of metal deposited by dc magnetron sputtering at low dc voltages and low substrate temperatures. The method provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.

Hollis, B. R., Jr.↗