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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 181 records · Page 10
All sourcesNASA NTRSDOE OSTI
NASA NTRS1998

Carbon Nanotube Based Nano-Electro-Mechanical Systems (NEMS)

Carbon nanotubes (CNT) enable nanoelectromechanical systems (NEMS) because of their inherent nanostructure, intrinsic electric conductivity and mechanical resilience. The collaborative work between Stanford (experiment) and NASA Ames (theory and simulation) has made progress in two types of CNT based NEMS for nanoelectronics and sensor applications. The CNT tipped scanning probe microscopy (SPM) is a NEMS in which CNT tips are used for nanoscale probing, imaging and manipulating. It showed great improvement in probing surfaces and biological systems over conventional tips. We have recently applied it to write (lithography) and read (image) uniform SiO2 lines on large Si surface area at speed up to 0.5 mm per s. Preliminary work using approximately 10 nm multiwall nanotube tips produced approximately 10 nm structures and showed that the CNT tips didn't wear down when crashed as conventional tips often do. This presents a solution to the long standing tip-wear problem in SPM nanolithography. We have also explored potential of CNT tips in imaging DNA in water. Preliminary experiment using 10 nm CNT tips reached 5 nm resolution. The 1 nm nanolithography and 1 nm DNA imaging can be expected by using approximately 1 nm CNT tips. In contrast to CNT tipped SPM, we also fabricated CNT devices on silicon wafer in which CNTs connect patterned metallic lines on SiO2/Si by a simple chemical vapor deposition process. Using conventional lithography for silicon wafer, we have been able to obtain CNT based transistors and sensors. Investigations of the CNT NEMS as physical, biological and chemical sensors are in progress and will be discussed.

Han, Jie↗
NASA NTRS2002

Evolvable, reconfigurable hardware for future space systems

This paper overviews Evolvable Hardware (EHW) technology, examining its potential for enhancing survivability and flexibility of future space systems. EHW refers to selfconfiguration of electronic hardware by evolutionary/genetic search mechanisms. Evolvable Hardware can maintain existing functionality in the presence of faults and degradations due to aging, temperature and radiation. It can also configure itself for new functionality when required for mission changes or encountered opportunities. The paper illustrates hardware evolution in silicon using a JPL-designed programmable device reconfigurable at transistor level as the platform and a genetic algorithm running on a DSP as the reconfiguration mechanism. Rapid reconfiguration allows convergence to circuit solutions in the order of seconds. The experiments demonstrate functional recovery from faults as well as from degradation at extreme temperatures indicating the possibility of expanding the operational range of extreme electronics through evolved circuit solutions.

Evolvable Hardware EHW↗
NASA NTRS2008

6H-SiC Transistor Integrated Circuits Demonstrating Prolonged Operation at 500 C

The NASA Glenn Research Center is developing very high temperature semiconductor integrated circuits (ICs) for use in the hot sections of aircraft engines and for Venus exploration where ambient temperatures are well above the approximately 300 degrees Centigrade effective limit of silicon-on-insulator IC technology. In order for beneficial technology insertion to occur, such transistor ICs must be capable of prolonged operation in such harsh environments. This paper reports on the fabrication and long-term 500 degrees Centigrade operation of 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). Simple analog amplifier and digital logic gate ICs have now demonstrated thousands of hours of continuous 500 degrees Centigrade operation in oxidizing air atmosphere with minimal changes in relevant electrical parameters. Electrical characterization and modeling of transistors and circuits at temperatures from 24 degrees Centigrade to 500 degrees Centigrade is also described. Desired analog and digital IC functionality spanning this temperature range was demonstrated without changing the input signals or power supply voltages.

Neudeck, Philip G.↗
NASA NTRS1991

Silicon device performance measurements to support temperature range enhancement

The results of the NPN bipolar transistor (BJT) (2N6023) breakdown voltage measurements were analyzed. Switching measurements were made on the NPN BJT, the insulated gate bipolar transistor (IGBT) (TA9796) and the N-channel metal oxide semiconductor field effect transistor (MOSFET) (RFH75N05E). Efforts were also made to build a H-bridge inverter. Also discussed are the plans that have been made to do life testing on the devices, to build an inductive switching test circuit and to build a dc/dc switched mode converter.

Johnson, R. Wayne↗
NASA NTRS1972

Overlap diffusion for increasing phototransistor dynamic range

Construction of improved phototransistors to provide increased base-collector capacitance is described. Silicon or germanium semiconductor wafers are used as examples. Operation of transistors and electrical properties are discussed and illustrations of the devices are included.

Mccann, D. H.↗
NASA NTRS1982

Advances in series resonant inverter technology and its effect on spacecraft employing electric propulsion

The efficiency of transistorized Series Resonant Inverters (SRIs), which is higher than that of silicon-controlled rectifier alternatives, reduces spacecraft radiator requirements by 40% and may eliminate the need for heat pipes on 30-cm ion thruster systems. Recently developed 10- and 25-kW inverters have potential applications in gas thrusters, and represent the first spaceborne SRI designs for such power levels. Attention is given to the design and control system approaches employed in these inverter designs to improve efficiency and reduce weight, along with the impact of such improved parameters on electric propulsion systems.

Robson, R. R.↗
NASA NTRS1987

Variations in the electrical short-circuit current decay for recombination lifetime and velocity measurements

An improved measurement system for electrical short-circuit current decay is presented that extends applicability of the method to silicon solar cells having an effective lifetime as low as 1 microsec. The system uses metal/oxide/semiconductor transistors as voltage-controlled switches. Advances in theory developed here increase precision and sensitivity in the determination of the minority-carrier recombination lifetime and recombination velocity. A variation of the method, which exploits measurements made on related back-surface field and back-ohmic contact devices, further improves precision and sensitivity. The improvements are illustrated by application to 15 different silicon solar cells.

Jung, Tae-Won↗
NASA NTRS1972

Methods of measurement for semiconductor materials, process control, and devices

Activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices are described. Accomplishments include the determination of the reasons for differences in measurements of transistor delay time, identification of an energy level model for gold-doped silicon, and the finding of evidence that it does not appear to be necessary for an ultrasonic bonding tool to grip the wire and move it across the substrate metallization to make the bond. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; measurement of thermal properties of semiconductor devices, delay time, and related carrier transport properties in junction devices, and noise properties of microwave diodes; and characterization of silicon nuclear radiation detectors.

Bullis, W. M.↗
NASA NTRS1980

Inductorless tuned circuit for high frequencies

Inductorless tuned circuit functions as filter, amplifier, or oscillator at radio frequencies. Circuit is based on two directly-coupled transistors operated at their transition frequency and fabricated as integrated circuit on single silicon chip.

Kleinberg, L.↗
NASA NTRS1980

Models of MOS and SOS devices

Quarterly report describes progress in three programs: dc sputtering machine for aluminum and aluminum alloys; two dimensional computer modeling of MOS transistors; and development of computer techniques for calculating redistribution diffusion of dopants in silicon on sapphire films.

Gassaway, J. D.↗
NASA NTRS1979

Semiconductor technology program. Progress briefs

The current status of NBS work on measurement technology for semiconductor materials, process control, and devices is reported. Results of both in-house and contract research are covered. Highlighted activities include modeling of diffusion processes, analysis of model spreading resistance data, and studies of resonance ionization spectroscopy, resistivity-dopant density relationships in p-type silicon, deep level measurements, photoresist sensitometry, random fault measurements, power MOSFET thermal characteristics, power transistor switching characteristics, and gross leak testing. New and selected on-going projects are described. Compilations of recent publications and publications in press are included.

Bullis, W. M.↗
NASA NTRS1982

A monolithic lead sulfide-silicon MOS integrated-circuit structure

A technique is developed for directly integrating infrared photoconductive PbS detector material with MOS transistors. A layer of chromium, instead of aluminum, is deposited followed by a gold deposition in order to ensure device survival during the chemical deposition of the PbS. Among other devices, a structure was fabricated and evaluated in which the PbS was directly coupled to the gate of a PMOS. The external bias, load, and source resistors were connected and the circuit was operated as a source-follower amplifier. Radiometric evaluations were performed on a variety of different MOSFETs of different geometry. In addition, various detector elements were simultaneously fabricated to demonstrate small element capability, and it was shown that elements of 25 x 25 microns could easily be fabricated. Results of room temperature evaluations using a filtered 700 K black body source yielded a detectivity at peak wavelength of 10 to the 11th cm (root Hz)/W at 100 Hz chopping frequency.

Jhabvala, M. D.↗
NASA NTRS1983

Logic Simulator Program

The source code for the SPICE 2 program was deblocked in order to isolate and compile the subroutine in an effort to provide a software simulation of discrete and combinatorial electronic components. Incompatibilities between the UNIVAC 1180 FORTRAN and the Sigma V CP-V FORTRAN 4 were resolved. The SPICE 2 model is to be used to determine gate and fan-out delays, logic state conditions, and signal race conditions for transistor array elements and circuit logic to be patterned in the (SPI) 7101 CMOS silicon gate semicustom array. The simulator is to be operable from the CP-V time sharing terminals.

Agarwal, R. K.↗
NASA NTRS1990

MCT/MOSFET Switch

Metal-oxide/semiconductor-controlled thyristor (MCT) and metal-oxide/semiconductor field-effect transistor (MOSFET) connected in switching circuit to obtain better performance. Offers high utilization of silicon, low forward voltage drop during "on" period of operating cycle, fast turnon and turnoff, and large turnoff safe operating area. Includes ability to operate at high temperatures, high static blocking voltage, and ease of drive.

Rippel, Wally E.↗
NASA NTRS2005

Static and Turn-on Switching Characteristics of 4H-Silicon Carbide SITs to 200 deg C

Test results are presented for normally-off 4H-SiC Static Induction Transistors (SITs) intended for power switching and are among the first normally-off such devices realized in SiC. At zero gate bias, the gate p-n junction depletion layers extend far enough into the conduction channel to cut off the channel. Application of forward gate bias narrows the depletion regions, opening up the channel to conduction by majority carriers. In the present devices, narrow vertical channels get pinched by depletion regions from opposite sides. Since the material is SiC, the devices are usable at temperatures above 150 C. Static curve and pulse mode switching observations were done at selected temperatures up to 200 C on a device with average static characteristics from a batch of similar devices. Gate and drain currents were limited to about 400 mA and 3.5 A, respectively. The drain voltage was limited to roughly 300 V, which is conservative for this 600 V rated device. At 23 C, 1 kW, or even more, could be pulse mode switched in 65 ns (10 to 90 percent) into a 100 load. But at 200 C, the switching capability is greatly reduced in large part by the excessive gate current required. Severe collapse of the saturated drain-to-source current was observed at 200 C. The relation of this property to channel mobility is reviewed.

Niedra, Janis M.↗
NASA NTRS2021

A Nanoscale Vacuum Field Emission Gated Diode with an Umbrella Cathode

A nanoscale field emission vacuum channel gated diode structure is proposed and a tungsten cathode with an umbrella-like geometry and sharp vertical edge is fabricated. The edge of the suspended cathode becomes the field emission surface. Unlike in the traditional transistor with the gate typically located between the source and the drain, the bottom silicon plate becomes the gate here and the anode terminal is located between the umbrella cathode and the gate. The fabricated devices show excellent diode characteristics and the gated diode structure is attractive for extremely low gate leakage.

Vacuum field emission diode↗