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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 199 records · Page 11
All sourcesNASA NTRSDOE OSTI
NASA NTRS1976

Contamination control in hybrid microelectronic modules

Thin and thick film test specimens were utilized to study the effects of silicone and epoxy hybrid microcircuit coatings on 0.025 mm diameter aluminum and gold ultrasonic bonds, and 0.051 diameter gold pulsed-thermocompression bonds. Chip-to-substrate and substrate-to-substrate geometries were included. Because sealed packages were utilized, a test pattern design was incorporated that allowed the determination of bond failures by making resistance measurements external to the package after the various environmental tests. All wire bonds were non-destructively pull tested prior to sealing. Tests included the PIN test, temperature cycling, and high temperature storage.

Himmel, R. P.↗
NASA NTRS1976

Microelectronic bioinstrumentation systems

Progress was made in the development of an RF cage, a single channel RF powered ECG telemetry system, and a three channel RF powered ECG, aortic blood pressure, and body temperature telemetry system. Encapsulation materials for chronic implantation of electronic circuits in the body were also evaluated.

Ko, W. H.↗
NASA NTRS1977

Application of microelectronic technology to general aviation flight control

This paper presents several different methods that can be used to determine the aircraft orientation (attitude) without direct measurement. The methods combine state estimation techniques with measurements from solid state pressure sensors, accelerometers, and magnetometers to determine the aircraft state. The paper demonstrates how the estimation algorithms were validated and compared using flight test data, and it presents results of performance sensitivity analyses of sensor error, modeling inaccuracies, and wind disturbance effects on the attitude estimation errors. If implemented, the methods presented could make it possible to eliminate directional and vertical gyros and to change from many isolated sensors to an integrated, small, reliable sensing package for determining the aircraft state.

Sorensen, J. A.↗
NASA NTRS1977

Overview of the tri-service hybrid microelectronics MM and T programs

It was stated that the Army has aggressively pursued new hybrid techniques more than either the Navy or Air Force. It has 30 ongoing hybrid projects in various stages of contracting and execution, while the Navy has 6 and Air Force 2. The Army is programming for 8 hybrid projects in fiscal year 1979, the Navy for 5 and Air Force none. In terms of dollars, the Army's fiscal year 1979 program is worth $2.25 million, and the Navy is expected to spend about $1.7 million.

Mcburney, C. E.↗
NASA NTRS1975

Automatic visual inspection system for microelectronics

A system for automatically inspecting an integrated circuit was developed. A device for shining a scanning narrow light beam at an integrated circuit to be inspected and another light beam at an accepted integrated circuit was included. A pair of photodetectors that receive light reflected from these integrated circuits, and a comparing system compares the outputs of the photodetectors.

Micka, E. Z.↗
NASA NTRS1979

Design, processing and testing of LSI arrays: Hybrid microelectronics task

Mathematical cost factors were generated for both hybrid microcircuit and printed wiring board packaging methods. A mathematical cost model was created for analysis of microcircuit fabrication costs. The costing factors were refined and reduced to formulae for computerization. Efficient methods were investigated for low cost packaging of LSI devices as a function of density and reliability. Technical problem areas such as wafer bumping, inner/outer leading bonding, testing on tape, and tape processing, were investigated.

Himmel, R. P.↗
NASA NTRS1979

An introduction to the BANNING design automation system for shuttle microelectronic hardware development

The BANNING MOS design system is presented. It complements rather than supplant the normal design activities associated with the design and fabrication of low-power digital electronic equipment. BANNING is user-oriented and requires no programming experience to use effectively. It provides the user a simulation capability to aid in his circuit design and it eliminates most of the manual operations involved in the layout and artwork generation of integrated circuits. An example of its operation is given and some additional background reading is provided.

Mcgrady, W. J.↗
NASA NTRS1981

Solid state microelectronics tolerant to radiation and high temperature

The 300 C electronics technology based on JFET thick film hybrids was tested up to 10 to the 9th power rad gamma (Si) and 10 to the 15th power neutrons/sq cm. Circuits and individual components from this technology all survived this total dose although some devices required 1 hour of annealing at 200 or 300 C to regain functionality. This technology used with real time annealing should function to levels greater than 10 to the 10th power rad gamma and 10 to the 16th power n/sq cm.

Draper, B. L.↗
NASA NTRS1983

Standards for Epoxies Used in Microelectronics

Improved qualification standards and test procedures for epoxy adhesives used in assembly of high-reliability hybrid microcircuits listed in new report. Objective of standards to resolve problems in areas of outgassing, bond shear strength, corrosivity, volume resistivity, ionic impurities, electrical stability, and frequency of qualification testing. pp

Caruso, S. V.↗
NASA NTRS1989

Nuclear fragmentation studies for microelectronic application

A formalism for target fragment transport is presented with application to energy loss spectra in thin silicon devices. Predicted results are compared to experiments with the surface barrier detectors of McNulty et al. The intranuclear cascade nuclear reaction model does not predict the McNulty experimental data for the highest energy events. A semiempirical nuclear cross section gives an adequate explanation of McNulty's experiments. Application of the formalism to specific electronic devices is discussed.

Ngo, Duc M.↗
NASA NTRS1990

Diamondlike carbon applications in infrared optics and microelectronics

The use of diamondlike carbon (DLC) as a protective coating in harsh environments is addressed. There are three topics presented. The first is a description of the preparation of DLC on seven different infrared transmitting materials, and the possibility of using DLC as an antireflecting coating at commonly used wavelengths. DLC doesn't bond easily to all materials, and special techniques for bonding are presented. The second topic deals with how well DLC will protect a substrate from moisture penetration. This is an important aspect in numerous uses of DLC, including both infrared optics and integrated circuits. The third topic is the effect of particulate impact on film performance and integrity.

Woollam, John A.↗
NASA NTRS1991

Field-emitter arrays for vacuum microelectronics

An ongoing program on microfabricated field-emitter arrays has produced a gated field-emitter tip structure with submicrometer dimensions and techniques for fabricating emitter arrays with tip packaging densities of up to 1.5 x 10 exp 7 tips/sq cm. Arrays have been fabricated over areas varying from a few micrometers up to 13 cm in diameter. Very small overall emitter size, materials selection, and rigorous emitter-tip processing procedures have contributed to reducing the potential required for field emission to tens of volts. Emission current densities of up to 100 A/sq cm have been achieved with small arrays of tips, and 100-mA total emission is commonly produced with arrays 1 mm in diameter containing 10,000 tips. Transconductances of 5.0 micro-S per tip have been demonstrated, indicating that 50 S/sq cm should be achievable with tip densities of 10 exp 7 tips/sq cm. Details of the cathode arrays and a variety of performance characteristics are discussed.

Spindt, C. A.↗
NASA NTRS1991

CRRES microelectronic test chip

The JPL CRRES chip was designed and fabricated in 1985 and included in the CRRES MEP. MOSFET Matrix results show the effect of shielding on radiation-induced MOSFET threshold voltage shifts and channel mobility degradation. Shielded (middle board) MOSFETs have a threshold-voltage damage factor that is approximately three orders of magnitude smaller than would be estimated from Co-60 ground tests. Unshielded (outer board) MOSFETs have a threshold-voltage damage factor that would be estimated from Co-60 ground tests. Temperature swings as large as 23 C with a 22.5 orbit periodicity affected the MOSFET data and were removed from the data in order to reveal the radiation effects. This experiment demonstrated the feasibility of characterizing MOSFETs in a matrix, thus reducing the complexity and mass of the experiment.

Lin, Y.-S.↗