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( Invited ) Ruggedness of SiC and GaN Power Transistors in Switching Based Tests
Currently, a spectrum of reliability tests are being performed by both device manufacturers and end users. Many of these qualification tests are operated within the device safe-operating-area (SOA), however, the devices often undergo dynamic events in many converter applications that can exceed the SOA boundaries. This paper presents our recent work on quantifying the out-of-SOA robustness of GaN power high-electron-mobility transistors (HEMTs) and SiC power MOSFETs by switching based tests. The unclamped inductive switching stresses are applied to p-gate GaN HEMTs to evaluate their surge-energy and overvoltage robustness. The continuous, hard-switching, turn-off stresses are applied to SiC MOSFETs to evaluate their overvoltage switching robustness. As a result, both experiments demonstrate the robustness of SiC and GaN devices under out-of-SOA switching events, and the physics of degradation and failure are understood.
True Breakdown Voltage and Overvoltage Margin of GaN Power HEMTs in Hard Switching
This work studies the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching. The dynamic BV measured in the hard switching circuits is over 1.4 kV, being 450 V higher than the static BV measured in the quasi-static I-V sweep. The device can survive at least 1 million hard-switching overvoltage pulses with 1.33 kV peak overvoltage (~95% dynamic BV). Recoverable device parametric shifts are observed after the 1-million pulses, featuring small reductions in threshold voltage and on-resistance. These shifts are different from the ones after the hard-switching pulses without overvoltage and are attributable to the trapping of the holes produced in impact ionization. Furthermore, these results suggest that the BV and overvoltage margin of GaN HEMTs in practical power switching can be significantly underestimated using the static BV. Index Terms— GaN, HEMT, power electronics, hard switching, breakdown voltage, overvoltage, ruggedness, reliability.
Comparison of CCM- and CRM-Based Boost Parallel Active Power Decoupler for PV Microinverter
Single-phase inverter or rectifier systems often make use of an active power decoupler (APD) to balance the mismatch between constant dc power and fluctuating ac power. This article deals with the comparison of continuous conduction mode (CCM) and critical conduction mode (CRM) operation-based design of a parallel boost-type APD for photovoltaic microinverter applications. From a design perspective, multiobjective analysis of efficiency, volume, and cost is explored within a decision space including planar inductors, gallium nitride based devices, film capacitors, switching frequency, and modulation (CCM vs. CRM). The theoretical study analyzes all possible design configurations within CCM and CRM and identifies Pareto-optimal designs, from which the selected CRM design can achieve reduced system volume and lower cost with the use of smaller inductor core, while operating with similar California Energy Commission efficiency drop as the selected CCM design. From a control perspective, a pulsewidth modulation based control strategy is proposed to implement closed-loop CRM modulation that does not rely on zero-crossing detection. Furthermore, closed-loop systems are designed for the optimal CCM and CRM realizations, and the final system characteristics are compared. Experimental results, obtained using two separate 40-V, 400-W hardware prototypes for CCM and CRM, are presented to verify the analyses.
Origin of Soft-Switching Output Capacitance Loss in Cascode GaN HEMTs at High Frequencies
Output capacitance (C OSS ) loss (E DISS ) is produced when the C OSS of a power device is charged and discharged, which ideally should be a lossless process. This loss was recently revealed to be a crucial concern for GaN high electron mobility transistors (HEMTs) in high-frequency soft-switching applications. Among various GaN devices, the composite-type, cascode GaN HEMT was reported to show the largest E DISS with a voltage dependence distinct from discrete GaN HEMTs. However, the physical origins of the EDISS in cascode GaN HEMTs remain unclear. This work fills this gap by identifying three loss components and, for the first time, experimentally quantifying them in the multi-MHz resonant switching. These loss components include a) the avalanche loss of Si MOSFET, b) the intrinsic E DISS of GaN HEMT, and c) the Si avalanche-induced GaN turn-ON loss. The last component was found to dominate E DISS at high voltage. By eliminating the Si avalanche and the associated loss components (a) and (c), the E DISS of cascode GaN HEMTs can be reduced by up to 75% at the price of an increase in output charge and switching transition time. Furthermore, these results provide new physical insights and practical guidelines to trim the soft-switching loss of cascode GaN HEMTs in high-frequency applications.
Bistable Optical Semiconductor Switching Based on C-Doped GaN
Highly resistive gallium nitride (GaN) is an essential material for power optoelectronic applications. While carbon doping is widely used to achieve semi-insulating properties in GaN, the persistent photoconductivity (PPC) arising from deep-level defect traps remains a major obstacle for high-speed power switching. This study demonstrates a novel approach: leveraging the ultrahigh photoresponsivity of GaN:C (up to 2.1 A ⋅ cm/W ⋅ kV, surpassing alternatives such as GaN:Fe) and employing defect-selective optical control to effectively quench the PPC. By synchronizing a short infrared (1064 nm) quenching pulse with UV (385 nm) excitation in an epitaxially grown GaN:C layer on a heavily doped n-type GaN substrate, we achieve a dramatic reduction in photocurrent fall time by approximately 293× (from 470 to 1.6 μ s), increasing modulation bandwidth from 745 Hz to nearly 218 kHz. Here, this advancement not only establishes a new pathway for controlling PPC in GaN:C but also enables the practical integration of GaN:C in fast power switching devices. Enhanced modulation bandwidth, along with GaN:C excellent photoresponsivity, makes it a promising candidate for optically controlled high-voltage, high-power electronic systems, such as photoconductive semiconductor switches (PCSSs) used in pulsed-power drivers, high-power microwave (HPM) sources, and high-voltage gate drivers for wide bandgap (WBG) power electronics.
Monte Carlo transport analysis to assess intensity dependent response of a carbon-doped GaN photoconductor
In this report evaluation of the photoresponse in wurtzite GaN photoconductive switches is presented based on kinetic Monte Carlo simulations. The focus is on electron transport physics and assessment of high frequency operation. The roles of GaN band structure, Pauli exclusion, and treatment of internal fields based on the fast multipole method are all comprehensively included. The implementation was validated through comparisons of velocity-field characteristics for GaN with computational results in the literature. Photocurrent widths of less than ~7 ps for the 1 μm device can be expected, which translates into a 100 GHz upper bound. Photocurrent pulse compression below the laser full width at half maxima at high applied fields are predicted based on the interplay of space-charge effects and the negative differential velocity characteristics of GaN.
Output Capacitance Loss of GaN HEMTs in Steady-State Switching
The output capacitance (C OSS ) loss, a loss produced when the device’s output capacitor is charged and discharged, has become a concern for GaN high electron mobility transistors (HEMTs) in high-frequency applications. This work presents a new, easy-to-implement method for the C OSS loss characterization based on the unclamped inductive switching (UIS) setup. As compared to prior approaches, this method involves the device’s ON-state conduction and could measure the C OSS loss in a single pulse and the steady-state switching. The C OSS loss of three types of mainstream commercial GaN HEMTs is characterized, which exhibit some common dependencies including a non-monotonic relation with the dv/dt (or resonance frequency), a linear relation with the ON-state current, a power-law relation with the peak blocking voltage, and little temperature dependence. In addition, their C OSS losses all show minimal distinctions in a single pulse and the steady-state switching, despite the increased on-resistance in the steady-state switching. Furthermore, this suggests that the traps accounting for the C OSS loss possess different de-trapping time constants as compared to the traps governing the dynamic on-resistance. Finally, a unified model is established to describe the C OSS loss of all three types of GaN HEMTs. These results provide important references for the high-frequency application of GaN HEMTs and new insights into the physical origin of their C OSS loss.1
Next-Generation, High-temperature, High-frequency, High-efficiency, High-power-density Traction System
To meet performance and reliability requirements necessary for broader adoption of electric drive vehicles, the Electrical and Electronics Technical Team of the U.S. Drive partnership has established aggressive design goals for next-generation electric vehicle drivetrains. Specifically, the 2025 roadmap stipulates a 100 kW/L power density target and a $\$$2.7/kW cost target for power electronics, in addition to high-voltage operation (i.e., greater than 800 VDC). The additional targets for traction motor and the overall system performance impose further challenges on the power electronics design. For example, many high specific power machines have reduced iron content, and therefore reduced intrinsic filtering, thus requiring the inverter to supply a low-distortion drive current. These machines also typically have a high pole count, thus requiring drive current at a higher electrical frequency. Other motors, such as brush-less dc and switch reluctance machines, require a carefully-shaped, non-sinusoidal drive current (Yang, Shang, Brown, & Krishnamurthy, 2015), (Zhang, Bowman, O'Connel, & Haran, 2018), (Anderson, et al., 2018). Two- and three-level inverter topologies are the conventional framework for the power electronics design of the drivetrain, and some demonstrations have shown recent progress towards addressing cost, power density and efficiency goals (Gurpinar & Ozpineci, 2018), (Zhu, Kim, Chen, Erickson, & Maksimović, 2018), (Deshpande, Chen, Narayanasamy, Sathyanarayanan, & Luo, 2018), (Alizadeh, et al., 2019). However, an unconventional approach may be necessary to take the dramatic leap in power density necessitated by the roadmap—while simultaneously addressing the other system needs. Therefore, this project leverages the flying capacitor multilevel (FCML) topology, together with a scalable, modular approach, to address these needs. This type of hybrid converter has several advantages: lower voltage (i.e., less than 300 V) transistors can be used, energy-dense capacitors process most of the power, and the output current waveform is multilevel and exhibits a frequency multiplying effect—in other words, the output has reduced dv/dt and filtering requirements for the same high voltage dc bus. For example, in an electric vehicle with an 800 V bus, a 10-level FCML could leverage 100 V, commercially available GaN devices switching at 115 kHz to produce a ~1 MHz switching waveform (modulated according to the motor drive requirements) with one ninth of the dv/dt of a two-level converter. Prior work has already demonstrated promising performance and gravimetric power density figures for more electric aircraft applications (Pallo, Foulkes, Modeer, Coday, & Pilawa-Podgurski, 2018). This project leverages lessons learned to achieve the volumetric power density of 100 kW/L by employing advanced liquid cooling, address the 300,000 mile reliability challenge with redundant design, topology failure studies and online health monitoring, and reduce costs to $\$$2.7/kW through the use of low-cost GaN devices, modular converter assemblies, and modest modifications to traditional manufacturing methods. The project involved several hardware designs, each achieving increasing performance. At the conclusion of the project, a volumetric power density of 380 kW/L was achieved, in a 800V dc-ac converter, greatly surpassing even the aggressive target goal.
CCM vs. CRM Design Optimization of a Boost-derived Parallel Active Power Decoupler for Microinverter Applications
Single-phase inverter or rectifier systems often make use of an auxiliary active power decoupler (APD) to balance the mismatch between steady DC power and fluctuating AC power. This paper deals with efficiency and size optimization of a parallel boost-type APD circuit for PV microinverter applications. Specifically, design of an eGaNFET-based, 400 W APD circuit, employing planar inductor and operating in either continuous conduction mode (CCM) or critical conduction mode (CRM) is considered. Available design variables including inductance value, inductor core geometry, capacitor voltage, switching frequency, and modulation scheme (CCM vs. CRM) are explored to identify Pareto-optimal configurations, which can achieve low California Energy Commission (CEC) efficiency drop while also reducing the footprint area of the inductor. The theoretical study predicts that the optimal CRM design can achieve 37% reduced inductor size, while operating with similar efficiency drop, compared to the optimal CCM design. Experimental results, obtained using two separate 40 V, 400 W hardware prototypes for CCM and CRM, are presented to verify the analyses.
Switching Modes for Reduction of Peak Voltage Transients in GaN-Based Three Level ANPC Inverter
The switching pole voltage can transition between P,0, and N states in a three-level active neutral point clamped (ANPC) inverter. State transitions between 0-P and 0-N can be realized with different switching modes. Three switching modes- Short 1 , Short 2 , and Full are studied considering the effect of capacitive current paths. The role of clamping and inner switch on/off conditions is determined using simplified equivalent circuit models. Short 2 with clamping switch off is beneficial for turn-on overvoltage suppression but results in high turn-off overvoltage. Full mode with a parallel current sharing path is effective for turn-off overvoltage suppression but leads to high turn-on overvoltage. Hence, a Modified Full mode is proposed to achieve the simultaneous objective of overvoltage suppression at both turn-on and turn-off transient during high load currents. This benefits 3L ANPC operation at a low power factor with a high load current at fundamental voltage zero crossing points. Here, a 650V GaN-based three-level ANPC inverter prototype is designed and used to evaluate the switching modes and overvoltage suppression strategies through double pulse tests and continuous operation.
High Voltage Regrown GaN P-N Diodes Enabled by Defect and Doping Control
This project studied and implemented methods to form GaN p-n diodes using selective area regrowth to achieve selective area doping. Successful selective area doping of GaN p-n diodes is an enabling factor to realize more advanced devices such as vertical transistors. The general challenge to selective area regrowth of GaN is that the primary etch method, inductively coupled plasma (ICP), damages the crystal and causes high leakage when didoes are formed by regrowth on the etched surface. Our approach used low damage etch methods following ICP etch to remove crystal damage and reduced leakage in the regrown diode. This project demonstrated 1.6 kV etched-and-regrown GaN p-n diodes using planar (non-selective) regrowth and 840 V etched-and-regrown p-n diodes using selective area regrown. Enabling factors were use of a low-damage reactive ion etch (RIE) to remove damage caused by the primary ICP etch combined with a multi-step junction terminal extension (JTE) process. Deep level defect investigation quantitatively correlated a deep level near the middle of the GaN band gap with ICP etch-induced leakage that was greatly mitigated by using a slow, low damage RIE process. This research is economically feasible for commercialization because the processes used in this project, including substrate type and source, epitaxial crystal growth and fabrication techniques are all standard to the GaN semiconductor industry. The fundamental understanding and foundational ability to produce kV-class GaN p-n diodes through etch-and-regrowth provides a path to realize high power, high efficiency GaN power switches that can significantly outperform commercial devices for next-generation electrical power conversion and transmission systems.
Wide Bandgap Solid State Circuit Breakers for AC and DC Microgrids
The objective of the project is to develop a new class of ultrafast, self-powered, programmable, autonomously operated, bidirectional solid state circuit breakers (SSCBs) using wide band gap (WBG) semiconductors with 1000X reduction in response time and 5X reduction in cost in comparison to commercial mechanical circuit breakers. In particular, we have developed two SSCB prototypes of 380VDC/220VAC/20A and 1000VDC/10A using GaN power switches for common distribution-level AC and DC voltages.
Power Layout Design of a GaN HEMTs-Based High-Power High-Efficiency Three-Level ANPC Inverter for 800 V DC Bus System
Multiple commutation paths exist for switching devices in a three-level active neutral point clamped (3L-ANPC) inverter operation based on the selected switching state and current direction. In addition, the capacitive coupling path of the nonswitching device is a key design aspect for enabling high voltage and high current operation of gallium nitride (GaN) switches in 3L-ANPC topology. A comprehensive study of the switching transient events of inner, outer, and clamping devices of 3L-ANPC is presented in this article. The commutation mechanisms for worst-case transient voltage overshoots (TVOs) are identified. A simplified equivalent circuit model is presented to determine the design criteria for the power layout structure's parasitic inductances. A power layout strategy satisfying the design criteria is then proposed using an insulated metal substrate power printed circuit board (PCB) to enable efficient high-power operation. The proposed design minimizes the commutation and capacitive coupling path inductances to 6 nH and 11.5 nH, respectively. This enables the fast switching operation of GaN HEMTs at 800 V dc, 36 A with a low TVO of 31% verified through experimental three-level double pulse test results. Experimental evaluation of a three-phase 3L-ANPC hardware prototype based on the proposed power layout shows 99% efficiency at 800 V, 9.5 kVA and 50 kHz switching frequency. The proposed design achieves a low case-to-ambient thermal resistance of 2.3 °C/W.
Quantifying Dynamic On-State Resistance of GaN HEMTs for Power Converter Design via a Survey of Low and High Voltage Devices
Designing and optimizing high switching frequency, ultra-efficient converters requires detailed knowledge of the behavior and parasitic parameters for both active and passive components. Recently, wide bandgap transistors have enabled simultaneous increases in both switching frequency and efficiency due to higher maximum operating junction temperature limits, lower dc on-state resistances, and reduced parasitic inductances and capacitances. Yet, the early acceptance of gallium-nitride (GaN) switches was plagued by detrimental dynamic on-state resistance effects. This complex phenomenon for GaN devices is characterized by deviations in on-state resistance from dc operating characteristics based on design choices such as the magnitude and duration of both voltage and current stress, switching mode, and junction temperature. While device manufacturers have made improvements compared to early generation devices, experimental evidence from a survey of commercial GaN transistors highlight measurable change in on-state resistance still exists due to variations in voltage stress during hard-switching operation. After sharing insights for obtaining low noise measurements, an analysis method along with two metrics are proposed to characterize dynamic on-state resistance measurements for power electronics designers. Furthermore, quantifying the performance of GaN devices with standardized metrics facilitates a fair comparison between different GaN device technologies during converter development, enables manufacturing qualification for GaN switches, and provides a benchmark to catalyze improvement for the next generation of GaN device development.
Adaptive Time-Division Multiplexing Driving System for Solid State Lighting with Multiple Tunable Channels
Next generation solid state lighting enables unlimited control of light and serve much broader functions beyond the basic lighting for illuminance. The emerging lighting for productivity, well-being, healthcare, and growth have revolutionized the scope of lighting. To empower this unlimited controllability, a multi-channel tunable power-electronics driver is essential but has not been satisfactorily addressed so far. Existing solutions are lossy, large, and expensive, due to introduction of additional buck power conversion stages. This paper proposes a time-division multiplexing (TDM) LED driving system which eliminates those buck stages. The proposed design can directly pair with off-the-shelf pulse width modulated (PWM) controllers and since it inherits entire feature sets, it can achieve low loss at standby and at dimmed condition. The simple analog implementation avoids usage of expensive DSPs/MCU. GaN’s high switching frequency capability can push up the multiplexing frequency so a GaN-based flyback was built and proved the concept.
Variable-Switching-Frequency Single-Stage Bidirectional GaN AC–DC Converter for the Grid-Tied Battery Energy Storage System
Not provided.