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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Optimized AC/DC Dual Active Bridge Converter using Monolithic SiC Bidirectional FET (BiDFET) for Solar PV Applications

Grid interface power conversion systems for commercial, industrial and residential solar power generation are becoming ubiquitous due to the competitive cost of solar energy. The AC/DC dual active bridge (DAB) converter is an upcoming topology in industrial PV energy and energy storage applications, providing bidirectional power transfer and galvanic isolation. In this paper, the properties of a DAB-type converter are leveraged to propose a design optimization process. It can optimize the high-frequency RMS current, size of magnetic elements and zero-voltage-switching (ZVS) region of the converter. The resulting design is compared against that derived from a conventional approach. In addition, an algorithm to compute the harmonic currents at the DC and line frequency AC ports of the system is proposed, and the respective filter designs are presented. The optimized design of the AC/DC DAB converter is implemented using the newly developed, 1200 V, 46 mΩ, four quadrant, SiC-based monolithic bidirectional FETs (BiDFET). Experimental results from the 2.3 kW, 400V/277VRMS hardware prototype are finally presented to verify the design process.

Bidirectional isolated AC-DC conversion, solar ene↗
DOE OSTI2024

FET Junction Temperature Monitoring Using Novel On-Chip Solution

A novel junction temperature monitoring sensor is proposed and experimentally demonstrated for application in MOS-gate power devices. The sensor is created using the polycide gate electrode layer of the devices to create a temperature-sensitive resistor without any additional fabrication steps. The resistor is located on the field oxide with one end grounded at the device reference terminal to isolate it from the device current and voltage transients. It allows in-situ monitoring of the device junction temperature during active circuit operation. The technology has been implemented to monitor the junction temperature of Silicon Carbide Junction Barrier Schottky Field Effect Transistors (SiC JBSFETs) with the bi-directional FET (BiDFET).

Bidirectional switches, SiC bidirectional FET, BiD↗
DOE OSTI2024

Variation Tolerant and Energy-Efficient Charge Domain Compute-in-Memory Array with Binary and Multi-Level Cell Ferroelectric FET

Here, in this work, we present a variation-tolerant and energy-efficient charge-domain Ferroelectric FET (FeFET) based Compute-in-Memory (CiM) array design that is compatible with both binary and multi-level cell memory sensing. We demonstrate that: 1) by exploiting FeFET as a nonvolatile switch, its high ON/OFF ratio in the subthreshold region can suppress the error introduced by the inaccurate ON state conductance, thus realizing robust CiM operations, unlike the current-domain CiM design where the computation results is highly sensitive to the device conductance variation; 2) by leveraging a dense dynamic random access memory (DRAM)-like 1FeFET1C cell structure, the proposed design benefits from the existing high density DRAM establishment while also significantly relaxing the capacitor retention and transistor leakage requirement; 3) the charge-domain CiM supports both binary FeFET with minimum overhead and MLC FeFET with tolerable latency for MLC state sensing, whose efficacy is validated experimentally on both cell-level and array-level; 4) the proposed CiM shows much better device variation resilience than conventional current-domain CiM, and also improves inference accuracy. Macro-level evaluation results demonstrate significantly higher energy efficiency and area efficiency compared to prior CiM works.

Duan, Jiahui [University of Notre Dame, IN (United↗
DOE OSTI2024

On the Origin of Holes During Polarization Reset in Floating Body Ferroelectric FETs Towards Improving Switching Efficiency

In this article, we performed a comprehensive combined experimental and modeling study on the polarization reset mechanisms of floating body (i.e., channel) ferroelectric FETs, an important class of device with growing interests due to added functionalities and improved reliabilities. Using fully-depleted silicon-on-insulator (FDSOI) FeFET as a classical example, we demonstrate that: 1) without hole generation mechanisms, floating body FeFETs during reset is simply a capacitor divider, with negligible ferroelectric voltage drop for switching; ii) Band-to-band-tunneling (BTBT) around gate-to-S/D overlap even with zero drain bias generates holes to facilitate the reset in FDSOI FeFET, though at a slower speed and hold the reset state; iii) With scaling, S/D inner fringe field can enable fast reset, thus offering a potential efficiency boost approach; iv) a compact FDSOI FeFET model is developed that can capture the BTBT effect and reproduce the observed behaviors; v) the reset mechanism is also validated in a NAND string composed of FDSOI FeFETs, demonstrating its relevant applications. These insights show the strategies in improving reset efficiency, i.e., enhanced BTBT and inner fringe field.

42 ENGINEERING↗
NASA NTRS1964

Put FETs to Work in Electrometers

Field-effect transistors, with their high impedance and low noise, can effectively measure very low currents. To bring the FET up to electrometer standards (so that it can measure currents of, say, 10 (sup -13) amp) the designer must know where the noise is and what to do about it.

ELECTROMETER↗
NASA NTRS1990

Development of improved pyroelectric detectors. Measurements of pyroelectric material characteristics and FET characteristics

Research was undertaken to improve the detectivity of the pyroelectric detector with the ultimate goal of operation at or near the temperature-noise limit. Two general areas of investigation were undertaken: (1) to improve responsivity through the use of new materials; and (2) to reduce noise through improved field effect transistor characteristics, and improved electroding of the pyroelectric material. FET's are being obtained from various manufacturers, evaulated, and selected units tested for evaluation of characteristics critical to their use as preamplifiers with pyroelectric detectors.

Weiner, S.↗
NASA NTRS1965

A Field-Effect Transistor (FET) model for ASAP

The derivation of the circuitry of a field effect transistor (FET) model, the procedure for adapting the model to automated statistical analysis program (ASAP), and the results of applying ASAP on this model are described.

Ming, L.↗
NASA NTRS1979

Development and fabrication of low ON resistance high current vertical VMOS power FETs

The design of a VMOS Power FET exhibiting low ON resistance, high current as well as high breakdown voltage and fast switching speeds is described. The design which is based on a 1st-order device model, features a novel polysilicon-gate structure and fieldplated groove termination to achieve high packing density and high breakdown voltage, respectively. One test chip, named VNTKI, can block 180 V at an ON resistence of 2.5 ohm. A 150 mil x 200 mil (.19 sq cm) experimental chip has demonstrated a breakdown voltage of 200v, an ON resistance of 0.12 ohm, a switching time of less than 100 ns, and a pulse drain - current of 50 A with 10 V gate drive.

Kay, S.↗
NASA NTRS1979

A 4-W 56-dB gain microstrip amplifier at 15 GHz utilizing GaAs FET's and IMPATT diodes

Performance results and design considerations are presented for an all solid-state Ku-band power amplifier which is feasible for use in PM communication systems for airborne or spacecraft transmitter applications. A six-stage GaAs FET preamplifier and a driver and balanced power amplifier utilizing GaAs IMPATT diodes operating in the injection locked oscillator mode are discussed. For high power and efficiency Schottky-Read IMPATT's with low-high-low doping profiles are employed. For improved reliability the IMPATT's incorporate a TiW barrier metallization to retard degradation of the IMPATT's. Results of accelerated life testing of the IMPATT devices are also presented.

Sokolov, V.↗
NASA NTRS1982

Flip-Chip Carrier Would Match Microwave FET Impedances

Proposed field-effect transistor consists of three cells which make up one complete FET pellet. Pellet is flip-chip mounted on carrier with source grounded gate and drain posts connected directly to impedance-matching transmission-line segments. Impedance transformers are part of mounting and contact strips.

Huang, H. C.↗