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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS1987

Real-Time "Garbage Collection" for List Processing

Two proposed algorithmic techniques for list processing enable immediate identification of computer memory cells having become inactive through disconnection from active cells, together with addition of these inactive cells to pool of reusable cells. These two "garbage collection" techniques reduce memory requirements of list processors or increase their speed or both. With both techniques, processing continuity maintained, enabling real-time processing.

Shuler, Robert L., Jr.↗
NASA NTRS2000

Non-Volatile Memory Technology Symposium 2000: Proceedings

This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2000 that was held on November 15-16, 2000 in Arlington, Virginia. The proceedings contains a wide range of papers that cover the presentations of myriad advances in the nonvolatile memory technology during the recent past including memory cell design, simulations, radiation environment, and emerging memory technologies. The papers presented in the proceedings address the design challenges and applications and deals with newer, emerging memory technologies as well as related issues of radiation environment and die packaging.

Aranki, Nazeeh↗
NASA NTRS1994

Improved Writing-Conductor Designs For Magnetic Memory

Writing currents reduced to practical levels. Improved conceptual designs for writing conductors in micromagnet/Hall-effect random-access integrated-circuit memory reduces electrical current needed to magnetize micromagnet in each memory cell. Basic concept of micromagnet/Hall-effect random-access memory presented in "Magnetic Analog Random-Access Memory" (NPO-17999).

Wu, Jiin-Chuan↗
NASA NTRS1985

The system of EAS time analysis

The extensive air showers' (EAS) front shape, angle of incidence, disk thickness, particle distribution along the shower, on the delayed and EAS front advancing particles were determined. The suggested system of the EAS time analysis allows determination of the whole EAS longitudinal structure at the observation points. The information from the detectors is continuously recorded in the memory with the memory cell switching in 5 ns, this enables fixation of the moment of pulse input from the detector with an accuracy to + or - 2.5 ns. Along with the fast memory, a slow memory with the cell switching in 1 micron s is introduced in the system, this permits observation of relatively large time intervals with respect to the trigger pulse with an appropriately lower accuracy.

Khalafyan, A. Z.↗
NASA NTRS1996

Photonic Diagnostic Technique For Thin Photoactive Films

Photonic diagnostic technique developed for use in noninvasive, rapid evaluation of thin paraelectric/ferroelectric films. Method proves useful in basic research, on-line monitoring for quality control at any stage of fabrication, and development of novel optoelectronic systems. Used to predict imprint-prone memory cells, and to study time evolution of defects in ferroelectric memories during processing. Plays vital role in enabling high-density ferroelectric memory manufacturing. One potential application lies in use of photoresponse for nondestructive readout of polarization memory states in high-density, high-speed memory devices. In another application, extension of basic concept of method makes possible to develop specially tailored ferrocapacitor to act as programmable detector, wherein remanent polarization used to modulate photoresponse. Large arrays of such detectors useful in optoelectronic processing, computing, and communication.

Thakoor, Sarita↗
DOE OSTI2024

Biophysical and Structural Features of αβT ‐Cell Receptor Mechanosensing: A Paradigmatic Shift in Understanding T‐Cell Activation

ABSTRACT αβT cells protect vertebrates against many diseases, optimizing surveillance using mechanical force to distinguish between pathophysiologic cellular alterations and normal self‐constituents. The multi‐subunit αβT‐cell receptor (TCR) operates outside of thermal equilibrium, harvesting energy via physical forces generated by T‐cell motility and actin‐myosin machinery. When a peptide‐bound major histocompatibility complex molecule (pMHC) on an antigen presenting cell is ligated, the αβTCR on the T cell leverages force to form a catch bond, prolonging bond lifetime, and enhancing antigen discrimination. Under load, the αβTCR undergoes reversible structural transitions involving partial unfolding of its clonotypic immunoglobulin‐like (Ig) domains and coupled rearrangements of associated CD3 subunits and structural elements. We postulate that transitions provide critical energy to initiate the signaling cascade via induction of αβTCR quaternary structural rearrangements, associated membrane perturbations, exposure of CD3 ITAMs to phosphorylation by non‐receptor tyrosine kinases, and phase separation of signaling molecules. Understanding force‐mediated signaling by the αβTCR clarifies long‐standing questions regarding αβTCR antigen recognition, specificity and affinity, providing a basis for continued investigation. Future directions include examining atomistic mechanisms of αβTCR signal initiation, performance quality, tissue compliance adaptability, and T‐cell memory fate. The mechanotransduction paradigm will foster improved rational design of T‐cell based vaccines, CAR‐Ts, and adoptive therapies.

Immunology↗
DOE OSTI2025

Securing 3D NAND Without Density Loss via In-Situ Encryption Using a Single Transistor XOR Cell

In this article, we push lightweight XOR-based in-situ encryption to extreme density by proposing a singletransistor XOR memory cell and applying it to 3D NAND, enabling secure data storage without density loss. Using a ferroelectric field-effect transistor (FeFET) as an example technology, we demonstrate that: i) a single-transistor memory can realize the XOR function by exploiting the ability to charge the source and drain separately and control current flow direction, eliminating the need for conventional encrypted cells that rely on complementary devices; ii) with a XOR-based cipher, encryption and decryption can be mapped to in-situ array operations, where ciphertext is stored as the threshold voltage (VTH) states of FeFETs in a NAND string, and decryption is achieved through read operations using key-dependent complementary source/drain bias; iii) the proposed technique is scalable to multi-level cell (MLC) storage by encrypting and decrypting data bit by bit; iv) using an integrated NAND FeFET array, we experimentally demonstrate encryption and decryption operations for both single-level cell (SLC) and MLC storage; v) systemlevel benchmarking shows that the proposed technique achieves 48× and 278× improvements in encryption and decryption throughput, respectively, compared to AES.

36 MATERIALS SCIENCE↗
NASA NTRS1994

Optically Addressable, Ferroelectric Memory With NDRO

For readout, memory cells addressed via on-chip semiconductor lasers. Proposed thin-film ferroelectric memory device features nonvolatile storage, optically addressable, nondestructive readout (NDRO) with fast access, and low vulnerability to damage by ionizing radiation. Polarization switched during recording and erasure, but not during readout. As result, readout would not destroy contents of memory, and operating life in specific "read-intensive" applications increased up to estimated 10 to the 16th power cycles.

Thakoor, Sarita↗
NASA NTRS1991

Heavy-ion induced single-event upset in integrated circuits

The cosmic ray environment in space can affect the operation of Integrated Circuit (IC) devices via the phenomenon of Single Event Upset (SEU). In particular, heavy ions passing through an IC can induce sufficient integrated current (charge) to alter the state of a bistable circuit, for example a memory cell. The SEU effect is studied in great detail in both static and dynamic memory devices, as well as microprocessors fabricated from bipolar, Complementary Metal Oxide Semiconductor (CMOS) and N channel Metal Oxide Semiconductor (NMOS) technologies. Each device/process reflects its individual characteristics (minimum scale geometry/process parameters) via a unique response to the direct ionization of electron hole pairs by heavy ion tracks. A summary of these analytical and experimental SEU investigations is presented.

Zoutendyk, J. A.↗
NASA NTRS1991

Self-Testing Static Random-Access Memory

Proposed static random-access memory for computer features improved error-detecting and -correcting capabilities. New self-testing scheme provides for detection and correction of errors at any time during normal operation - even while data being written into memory. Faults in equipment causing errors in output data detected by repeatedly testing every memory cell to determine whether it can still store both "one" and "zero", without destroying data stored in memory.

Chau, Savio↗
NASA NTRS1993

Single Event Upset Behavior of CMOS Static RAM Cells

An improved state-space analysis of the CMOS static RAM cell is presented. Introducing theconcept of the dividing line, the critical charge for heavy-ion-induced upset of memory cells can becalculated considering symmetrical as well as asymmetrical capacitive loads. From the criticalcharge, the upset-rate per bit-day for static RAMs can be estimated.

Lieneweg, Udo↗
NASA NTRS2018

Error Characterization and Mitigation for 16Nm MLC NAND Flash Memory Under Total Ionizing Dose Effect

A data device includes a memory having a plurality of memory cells configured to store data values in accordance with a predetermined rank modulation scheme that is optional and a memory controller that receives a current error count from an error decoder of the data device for one or more data operations of the flash memory device and selects an operating mode for data scrubbing in accordance with the received error count and a program cycles count.

Li, Yue↗
NASA NTRS1989

Asymmetrical SRAM Cells For Radiation Tests

Features of circuits altered to increase or decrease sensitivity to radiation. State-space analysis used to analyze single-event-upset behavior of memory cell. When voltage on node a is set at one of indicated initial values Vao and then released, voltages on nodes a and b then follow indicated trajectory to final logic "one" or logic "zero" state. Ability to do this important for design of radiation-detecting integrated circuits (deliberately made more sensitive to ionizing radiation) and "radiation-hardened" integrated circuits - those intended to be relatively invulnerable to intense radiation.

Buehler, Martin G.↗
NASA NTRS1999

T Cell Activation Thresholds are Affected by Gravitational

T cells stimulated in space flight by various mitogenic signals show a dramatic reduction in proliferation and expression of early activation markers. Similar results are also obtained in a ground based model of microgravity, clinorotation, which provides a vector-averaged reduction of the apparent gravity on cells without significant shear force. Here we demonstrate that T cell inhibition is due to an increase in the required threshold for activation. Dose response curves indicate that cells activated during clinorotation require higher stimulation to achieve the same level of activation, as measured by CD69 expression. Interleukin 2 receptor expression, and DNA synthesis. The amount of stimulation necessary for 50% activation is 5 fold in the clinostat relative to static. Correlation of TCR internalization with activation also exhibit a dramatic right shift in clinorotation, demonstrating unequivocally that signal transduction mechanism independent of TCR triggering account for the increased activation threshold. Previous results from space flight experiments are consistent with the dose response curves obtained for clinorotation. Activation thresholds are important aspects of T cell memory, autoimmunity and tolerance Clinorotation is a useful, noninvasive tool for the study of cellular and biochemical event regulating T cell activation threshold and the effects of gravitation forces on these systems.

Adams, Charley↗
NASA NTRS2008

Disturb testing in flash memories

Non-volatile memory technology as defined by NAND architecture flash memory continues to lead the process scaling and device shrinking efforts of the entire integrated circuit industry. 45- nm technology nodes are now producing commercial 32Gb devices. These latest 32Gb devices are pioneering new charge trapping memory cell technologies using metal gates and high-k dielectric materials. These cells are called TANOS and consist of tantalum-nitride, aluminum oxide (high k material), nitride, oxide, and silicon. Such high-density memories continue to revolutionize commercial electronics in terms of new high-speed data architectures and significant reductions in overall power and weight consumption. In stark contrast, nearly all science-based interplanetary and earth-orbiting NASA spacecraft are still designing in and around mid-1980s-level non-volatile technology with 1Mb Electrically Erasable Read-Only Memory (EEPROM) devices. NASA has typically shunned the use of modern flash devices because of radiation and reliability concerns due to the commercial-offthe– shelf (COTS) nature of the NAND flash technology. Given the significant potential increases in overall system capability these modern flash devices could bring to NASA missions, it is important to continue to investigate these devices. This report will investigate certain portions of the reliability performance of NAND flash devices, specifically the disturb properties. Understanding the possible limitations such new non-volatile memory technology presents to NASA is the goal of this report.

Freie, Michael↗
NASA NTRS1989

Thin film memory matrix using amorphous and high resistive layers

Memory cells in a matrix are provided by a thin film of amorphous semiconductor material overlayed by a thin film of resistive material. An array of parallel conductors on one side perpendicular to an array of parallel conductors on the other side enable the amorphous semiconductor material to be switched in addressed areas to be switched from a high resistance state to a low resistance state with a predetermined level of electrical energy applied through selected conductors, and thereafter to be read out with a lower level of electrical energy. Each cell may be fabricated in the channel of an MIS field-effect transistor with a separate common gate over each section to enable the memory matrix to be selectively blanked in sections during storing or reading out of data. This allows for time sharing of addressing circuitry for storing and reading out data in a synaptic network, which may be under control of a microprocessor.

Thakoor, Anilkumar P.↗
NASA NTRS1994

Improved Ferroelectric Memories With Nondestructive Readout

Ferroelectric memories with enhanced photoresponse leading to improved nondestructive optoelectronic readout and lower power demand proposed. Memories improved versions of devices described in "Rapid, Nondestructive Readout From Ferroelectric Memory" (NPO-18551). In proposed application, array of nonvolatile ferroelectric memory cells fabricated by standard very-large-scale integrated-circuit techniques and flip-bonded onto similarly fabricated array of semiconductor lasers, {see "Optically Addressable, Ferroelectric Memory With NDRO" (NPO-18573)}.

Thakoor, Sarita↗
NASA NTRS1993

SEU/SRAM as a Process Monitor

The SEU/SRAM is a 4-kbit Static Random Access Memory (SRAM) designed to detect Single-Event Upsets (SEUs) produced by high energy particles. This device was used to determine the distribution in the memory cell spontaneous flip potential.

distribution residual plots↗