Predictive quantum transport simulations for advanced nano-scale FET-based sensors
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Growing of silicon nitride films, and radiation induced etch rate enhancement in silicon nitride films
Nonlinear model of field effect transistor for computer aided transient analysis of complementary metal oxide semiconductor-field effect transistor NAND gate
Equivalent circuit and modified and approximate models for metal oxide semiconductor-field effect transistor devices, and adaptability to computerized circuit design
Precision full wave rectifier circuit for rectifying incoming electrical signals having positive or negative polarity with only positive output signals
Gamma, X-ray, electron, or other radiation is used to shift threshold potentials of MOS devices on logic circuits. Before irradiation MOS gates to be shifted are biased positive and other gates are grounded to substrate. Threshold lasts 10 years. Thermal annealing brings circuit back to original configuration.
The object of this program is to improve the detectivity of the pyroelectric detector with the ultimate goal of operation at or near the temperature noise limit. Two general areas of investigation are undertaken. The first is to improve responsivity through the use of new materials. The second is directed toward reduction of noise and will be effected with improved field effect transistor characteristics, and improved electroding of the pyroelectric material. The review of the literature on pyroelectric materials continues. From this, several materials have already been selected for investigation, and several were tested.
Modified fabrication technique for P-channel MOSFET devices eliminates problems involving gate placement and gate overlap. Technique provides self-aligned gate, eliminating complexity of mask aligning. Devices produced by this process are considerably faster than conventional MOSFET's and process increases yield.
Method is applied in middle of fabrication process: (a) after mask region is formed, diffused-boron region is etched; (b) etching is left incomplete for ion implantation; (c) boron ions are implanted into region to define accurately crucial geometry of V-groove; (d) groove is etched to completion, forming two well-defined diffusion regions that serve as source and drain of transistor. Remaining process is conventional.
A research program for the development of a 10.6 micron HgCdTe photodiode/GaAs field effect transistor amplifier package for use at cryogenic temperatures (77k). The photodiode/amplifier module achieved a noise equivalent power per unit bandwidth of 5.7 times 10 to the 20th power W/Hz at 2.0 GHz. The heterodyne sensitivity of the HgCdTe photodiode was improved by designing and building a low noise GaAs field effect transistor amplifier operating at 77K. The Johnson noise of the amplifier was reduced at 77K, and thus resulted in an increased photodiode heterodyne sensitivity.
In the case of modern infrared focal planes, one of the major problems is related to the noise contribution of the cooled, impedance-matching device used as the preamplifier stage in the detector electronics system. An ideal preamp device should have the low-noise advantages of a buried-channel device and operate isothermally with the low-temperature detector array. The Ge JFET might provide this ideal device. A testing program with Ge JFETs is discussed. It is concluded that germanium JFETs offer an attractive alternative for cryogenic preamplifier designs. They operate well with high transconductance and low noise at LHe temperatures. It is believed that these devices point the way for the development of large, integrated-array, long wavelength, infrared focal planes which incorporate germanium detectors, germanium load resistors, and germanium preamplifiers within the same monolithic structure.
Test were conducted to measure the performance of the 20-GHz solid state, proof-of-concept amplifier. The amplifier operates over the 17.7 to 20.2-GHz frequency range and uses high power gallium arsenide field effect transistors. The amplifier design and test methods are briefly described. NASA and contractor performance data are compared.
A MOSFET structure having a biased gate covered with an insulator is described. The insulator is of such a thickness as to render the structure capable of giving a measure of accumulated charge. The structure is also capable of being used in a stacked structure as a particle spectrometer.
New metal-oxide-semiconductor field-effect transistors designed for source-follower preamplifiers operating at liquid-helium temperatures in conjunction with infrared detectors. Lower thresholds and offset give CryoFET's greater dynamic range and linearity than conventional MOSFET's at low temperatures and facilitates pair balancing to reduce offsets in output. Reduces heat loading of cryogenic system, extending life, reliability, and performance of cryogenic infrared instruments.
A temperature independent device is presented which uses a quantum well structure and delta doping within the channel. The device requires a high delta doping concentration within the channel to achieve a constant Hall mobility and carrier concentration across the temperature range 300-1.4 K. Transistors were RF tested using on-wafer probing and a constant G sub max and F sub max were measured over the temperature range 300-70 K.
A novel cryogenic design of a source follower per detector (SFD) direct readout multiplexer is demonstrated. This design has proven to be a good prototype for the development of new low-noise large-area cryogenic multiplexers. In the absence of clocking noise, the readout demonstrates as low as about 30 electrons of rms read noise. There is still an excess noise component feeding through when the array is clocked, which manifests itself only at the lower temperatures. The shape of this component is dependent on a number of the bias voltages, and especially on the temperature of the chip. Analysis of the noise spectral density of the unit cell under various bias conditions shows that there is an excess spectral noise component at the lower temperatures.
Over the course of this program, very extensive progress was made in Ka-band GaAs technology. At the beginning of the program, odd-shaped VPE MESFET wafers were used. A breakthrough in power and efficiency was achieved with highly doped (8 x 10(exp 17) cm(exp -3) MBE grown MESFET material. We obtained power of 112 mW with 16 dB gain and 21.6% efficiency at 34 GHz with a monolithic 50-100-250 micron amplifier. The next breakthrough came with the use of heterostructures grown by MBE (AlGaAs/InGaAs where the InGaAs is highly doped). This allowed us to achieve high power density with high efficiency. A benchmark 40% efficiency was achieved with a single-stage 100 micron MMIC at 32.5 GHz. The corresponding three-stage 50-100-250 micron amplifier achieved 180 mW with 23 dB gain and 30.3% efficiency. The next breakthrough came with 3-inch MBE grown PHEMT wafers incorporating an etch-stop layer for the gate recess (using RIE). Again, state-of-the-art performances were achieved: 40% efficiency with 235 mW output power and 20.7 dB gain. The single-stage 2 x 600 micron chip demonstrated 794 mW output power with 5 dB gain and 38.2% power-added efficiency (PAE). The Ka-band technology developed under this program has promise for extensive use: JPL demonstrated 32 GHz phased arrays with a three-stage amplifier developed under this contract. A variation of the three-stage amplifier was used successfully in a 4 x 4 phased array transmitter developed under another NASA contract.