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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8

Charge-coupled differential amplifier

Device solves problem of differential voltage gain in sampled-data metal-oxide semiconductor, producing gain at any frequency compatible with CCD operation, with low noise, low power, good linearity, and high stability.

Hewes, C. R.↗

A complementary MOS process

The complete sequence used to manufacture complementary metal oxide semiconductor (CMOS) integrated circuits is described. The fixed-gate array concept is presented as a means of obtaining CMOS integrated circuits in a fast and reliable fashion. Examples of CMOS circuits fabricated by both the conventional method and the fixed-gate array method are included. The electrical parameter specifications and characteristics are given along with typical values used to produce CMOS circuits. Temperature-bias stressing data illustrating the thermal stability of devices manufactured by this process are presented. Results of a preliminary study on the radiation sensitivity of circuits manufactured by this process are discussed. Some process modifications are given which have improved the radiation hardness of our CMOS devices. A formula description of the chemicals and gases along with the gas flow rates is also included.

Jhabvala, M. D.↗

CMOS-array design-automation techniques

Thirty four page report discusses design of 4,096-bit complementary metal oxide semiconductor (CMOS) read-only memory (ROM). CMOSROM is either mask or laser programable. Report is divided into six sections; section one describes background of ROM chips; section two presents design goals for chip; section three discusses chip implementation and chip statistics; conclusions and recommendations are given in sections four thru six.

Feller, A.↗

All-ion-implantation process for integrated circuits

Simpler than diffusion fabrication, ion bombardment produces complementary-metal-oxide-semiconductor / silicon-on-sapphire (CMOS/SOS) circuits that are one-third faster. Ion implantation simplifies the integrated circuit fabrication procedure and produces circuits with uniform characteristics.

Woo, D. S.↗

The effects of the geosynchronous energetic particle radiation environment on spacecraft charging phenomena

The energetic electron environment at the geosynchronous orbit is responsible for a variety of adverse charging effects on spacecraft components. The most serious of these is the degradation and failure of a complementary-metal-oxide-semiconductor (CMOS) electronic components as a result of internal charge-buildup induced by the energetic electrons. Efforts to accurately determine the expected lifetime of these components in this orbit are hampered by the lack of detailed knowledge of the electron spectrum and intensity, particularly of the more penetrating energies greater than 1.5 MeV. This problem is illustrated through the calculation of the dose received by a CMOS device from the energetic electrons and associated bremsstrahlung as a function of aluminum shielding thickness using the NASA AE-6 and the Aerospace measured electron environments. Two computational codes which were found to be in good agreement were used to perform the calculations. For a given shielding thickness the dose received with the two radiation environments differ by as much as a factor of seven with a corresponding variation in lifetime of the CMOS.

Reagan, J. B.↗

Charge-flow structures as polymeric early-warning fire alarm devices

The charge-flow transistor (CFT) and its applications for fire detection and gas sensing were investigated. The utility of various thin film polymers as possible sensing materials was determined. One polymer, PAPA, showed promise as a relative humidity sensor; two others, PFI and PSB, were found to be particularly suitable for fire detection. The behavior of the charge-flow capacitor, which is basically a parallel-plate capacitor with a polymer-filled gap in the metallic tip electrode, was successfully modeled as an RC transmission line. Prototype charge-flow transistors were fabricated and tested. The effective threshold voltage of this metal oxide semiconductor was found to be dependent on whether surface or bulk conduction in the thin film was dominant. Fire tests with a PFI-coated CFT indicate good sensitivity to smouldering fires.

Sechen, C. M.↗

A Schottky-barrier solar cell on sliced polycrystalline GaAs

Antireflecting-metal-oxide-semiconductor (AMOS) technology has been applied to sliced wafers of polycrystalline GaAs having grain sizes of about 100 microns. Simulated AM1 sunlight efficiencies up to 14% were obtained, and studies using the scanning electron microscope showed that grain boundaries have a minimal effect on short-circuit current density. However, current-voltage characteristics show some influence on open-circuit voltage.

Yeh, Y. C. M.↗

CMOS circuit-fabrication handbook

Report describes complementary metal-oxide-semiconductor (CMOS) process used to fabricate integrated circuits at Marshall Space Flight Center. It also presents general discussions of circuit design, mask making packaging, and testing.

Bouldin, D. L.↗

CMOS analog switches for adaptive filters

Adaptive active low-pass filters incorporate CMOS (Complimentary Metal-Oxide Semiconductor) analog switches (such as 4066 switch) that reduce variation in switch resistance when filter is switched to any selected transfer function.

Dixon, C. E.↗

Measuring charge nonuniformity in MOS devices

Convenient method of determining inherent lateral charge non-uniformities along silicon dioxide/silicon interface of metal-oxide-semiconductor (MOS) employs rapid measurement of capacitance of interface as function of voltage at liquid nitrogen temperature. Charge distribution is extracted by fast-Fourier-transform analysis of capacitance voltage (C-V) measurement.

Maserjian, J.↗

Ionized dopant concentrations at the heavily doped surface of a silicon solar cell

Data are combined with concentrations obtained by a bulk measurement method using successive layer removal with measurements of Hall effect and resistivity. From the MOS (metal-oxide-semiconductor) measurements it is found that the ionized dopant concentration N has the value (1.4 + or - 0.1) x 10 to the 20th power/cu cm at distances between 100 and 220 nm from the n(+) surface. The bulk measurement technique yields average values of N over layers whose thickness is 2000 nm. Results show that, at the higher concentrations encountered at the n(+) surface, the MOS C-V technique, when combined with a bulk measurement method, can be used to evaluate the effects of materials preparation methodologies on the surface and near surface concentrations of silicon cells.

Weinberg, I.↗

Progress in MOSFET double-layer metalization

Report describes one-year research effort in VLSL fabrication. Four activities are described: theoretical study of two-dimensional diffusion in SOS (silicon-on-sapphire); setup of sputtering system, furnaces, and photolithography equipment; experiments on double layer metal; and investigation of two-dimensional modeling of MOSFET's (metal-oxide-semiconductor field-effect transistors).

Gassaway, J. D.↗

CADAT field-effect-transistor simulator

CADAT field-effect transistor simulator (FETSIM) analyzes dc and transient behavior of metal-oxide-semiconductor (MOS) circuits. Both N-MOS and P-MOS transistor configurations in either bulk of silicon-on-sapphire (SOS) technology and almost any combination of R/C elements are analyzed.

Source record↗

Modelling switching-time effects in high-frequency power conditioning networks

Power transistor networks which switch large currents in highly inductive environments are beginning to find application in the hundred kilohertz switching frequency range. Recent developments in the fabrication of metal-oxide-semiconductor field-effect transistors in the power device category have enhanced the movement toward higher switching frequencies. Models for switching devices and of the circuits in which they are imbedded are required to properly characterize the mechanisms responsible for turning on and turning off effects. Easily interpreted results in the form of oscilloscope-like plots assist in understanding the effects of parametric studies using topology oriented computer-aided analysis methods.

Owen, H. A.↗

The PR2D (Place, Route in 2-Dimensions) automatic layout computer program handbook

Place, Route in 2-Dimensions is a standard cell automatic layout computer program for generating large scale integrated/metal oxide semiconductor arrays. The program was utilized successfully for a number of years in both government and private sectors but until now was undocumented. The compilation, loading, and execution of the program on a Sigma V CP-V operating system is described.

Edge, T. M.↗

Study of digital charge coupled devices

Charge coupled devices represent unique usage of the metal oxide semiconductor concept. These devices can sample an AC signal at the input, transfer charge proportional to this signal through the CCD shift register and then provide an output of the same frequency and shape as the input. The delay time between input and output is controlled by the CCD operating frequency and the number of stages in the shift resistor. This work is a reliability evaluation of the buried channel and surface channel CCD technologies. The constructions are analyzed, failure modes are described, and test results are reported.

Wilson, D. D.↗

High-efficiency thin-film GaAs solar cells, phase2

Thin GaAs epi-layers with good crystallographic quality were grown using a (100) Si-substrate on which a thin Ge epi-interlayer was grown by CVD from germane. Both antireflection-coated metal oxide semiconductor (AMOS) and n(+)/p homojunction structures were studied. The AMOS cells were fabricated on undoped-GaAs epi-layers deposited on bulk poly-Ge substrates using organo-metallic CVD film-growth, with the best achieved AM1 conversion efficiency being 9.1%. Both p-type and n(+)-type GaAs growth were optimized using 50 ppm dimethyl zinc and 1% hydrogen sulfide, respectively. A direct GaAs deposition method in fabricating ultra-thin top layer, epitaxial n(+)/p shallow homojunction solar cells on (100) GaAs substrates (without anodic thinning) was developed to produce large area (1 sq/cm) cells, with 19.4% AM1 conversion efficiency achieved. Additionally, an AM1 conversion efficiency of 18.4% (17.5% with 5% grid coverage) was achieved for a single crystal GaAs n(+)/p cell grown by OM-CVD on a Ge wafer.

Yeh, Y. C. M.↗

Optically induced bistable states in metal/tunnel-oxide/semiconductor /MTOS/ junctions

A new switching phenomenon in metal-oxide semiconductor tunnel junction has been discovered. With a sufficiently large negative bias applied to the electrode, incident visible light of intensity greater than about 1 microW/sq cm causes the reverse-biased junction to switch from a low-current to a high-current state. It is believed that hot-electron-induced impact ionization provides the positive feedback necessary for switching, and causes the junction to remain in its high-current state after the optical excitation is removed. The junction may be switched back to the low-current state electrically. The basic junction characteristics have been measured, and a simple model for the switching phenomenon has been developed.

Lai, S. K.↗