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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 163 records · Page 9
All sourcesNASA NTRSDOE OSTI
NASA NTRS1997

High sensitivity real-time NVR monitor

A real time non-volatile residue (NVR) monitor, which utilizes surface acoustic wave (SAW) resonators to detect molecular contamination in a given environment. The SAW resonators operate at a resonant frequency of approximately 200 MHz-2,000 MHz which enables the NVR monitor to detect molecular contamination on the order of 10.sup.-11 g-cm.sup.-2 to 10.sup.-13 g-cm.sup.2. The NVR monitor utilizes active temperature control of (SAW) resonators to achieve a stable resonant frequency. The temperature control system of the NVR monitor is able to directly heat and cool the SAW resonators utilizing a thermoelectric element to maintain the resonators at a present temperature independent of the environmental conditions. In order to enable the direct heating and cooling of the SAW resonators, the SAW resonators are operatively mounted to a heat sink. In one embodiment, the heat sink is located in between the SAW resonators and an electronic circuit board which contains at least a portion of the SAW control electronics. The electrical leads of the SAW resonators are connected through the heat sink to the circuit board via an electronic path which prevents inaccurate frequency measurement.

Bowers, William D.↗
NASA NTRS1990

Data-Acquisition Board For IBM PS/2 Computer

Circuit board containing microprocessors designed to control acquisition of data by IBM PS/2 computer. Plugged into one of 16-bit slots on mother board of computer. Controls transfer of data from as many as 48 discrete channels to Micro Channel Interface. With expansion of software, board recognizes and filters specified kinds of signal patterns, possibly to detect errors.

Hoang, Phuong-Dung T.↗
NASA NTRS1993

Testing Services

Trace Laboratories is an independent testing laboratory specializing in testing printed circuit boards, automotive products and military hardware. Technical information from NASA Tech Briefs and two subsequent JPL Technical Support packages have assisted Trace in testing surface insulation resistance on printed circuit board materials. Testing time was reduced and customer service was improved because of Jet Propulsion Laboratory technical support packages.

Source record↗
NASA NTRS1983

At grade optical crossover for monolithic optial circuits

Planar optical circuits may be made to cross through each other, (thus eliminating extra steps required to fabricate elevated, nonintersecting crossovers) by control of the dimensions of the crossing light conductors (10, 12) to be significantly greater than d=0.89.lambda. and the angle of crossing as nearly 90.degree. as conveniently possible. A light trap may be provided just ahead of the intersection to trap any light being reflected in the source conductor at angles greater than about 45.degree.. The light trap may take the form of triangular shaped portions (16a, 16b) on each side of the source conductor with the far side of the triangular portion receiving incident light at an angle so that incident light will be reflected to the other side, or it may take the form of windows (18a, 18b) in place of the triangular portions. Planar optical circuit boards (21-23) may be fabricated and stacked to form a keyboard (20) with intersecting conductors (26-29) and keyholes (0-9) where conductors merge at the broad side of the circuit boards. These keyholes may be prearranged to form an array or matrix of keyholes.

Jamieson, Robert S.↗
NASA NTRS2003

Signal-Conditioning Amplifier Recorders

Signal-conditioning amplifier recorders (SCAmpRs) have been proposed as a means of simplifying and upgrading the Kennedy Space Center (KSC) Ground Measurement System (GMS), which is a versatile data-acquisition system that gathers and records a variety of measurement data before and during the launch of a space shuttle. In the present version of the GMS system, signal conditioning amplifiers digitize and transmit data to a VME chassis that multiplexes up to 416 channels. The data is transmitted via a high-speed data bus to a second VME chassis where it is available for snapshots. The data is passed from the second VME chassis to a high-speed data recorder. This process is duplicated for installations at two launch pads and the Vehicle Assembly Building (VAB). Since any failure of equipment in the data path results in loss of data, much of the system is redundant. The architecture of the existing GMS limits expansion or any modification to the system to meet changing requirements because of the cost and time required. A SCAmpR-based system is much more flexible. The basis of the simplification, flexibility, and reliability is the shifting of the recording function to the individual amplifier channels. Each SCAmpR is a self-contained single channel data acquisition system, which in its current implementation, has a data storage capacity of up to 30 minutes when operating at the fastest data sampling rates. The SCAmpR channels are self-configuring and self-calibrating. Multiple SCAmpR channels are ganged on printed circuit boards and mounted in a chassis that provides power, a network hub, and Inter-Range Instrument Group (IRIG) time signals. The SCAmpR channels share nothing except physical mounting on a circuit board. All circuitry is electrically separate for each channel. All that is necessary to complete the data acquisition system is a single master computer tied to the SCAmpR channels by standard network equipment. The size of the data acquisition system dictates the requirements for the specific network equipment.

Medelius, Pedro J.↗
NASA NTRS1991

Electrical Connectors

Betaflex connectors are sockets that connect multichip modules and high density ceramic packages to printed circuit boards. They incorporate shape memory alloy technology, developed under NASA contract. Aimed at computer, telecommunication, avionics and military markets, the connectors enable designers to gain up to 40 percent more board space and provide 100 signal lines to the inch. When the nickel titanium element in the connector is heated by a low voltage power supply, the connector's spring is opened allowing the circuit board to be inserted with zero force. This makes assembly easier and more reliable. Beta Phase was taken over by Mopex, BPS and currently manufactures these connectors.

Source record↗
NASA NTRS2003

A Comparison of Two Panasonic Lithium-Ion Batteries and Cells for the IBM Thinkpad

The IBM Thinkpad 760XD has been used in the Orbiter and International Space Station since 2000. The Thinkpad is powered by a Panasonic Li-ion battery that has a voltage of 10.8 V and 3.0 Ah capacity. This Thinkpad is now being replaced by the IBM Thinkpad A31P which has a Panasonic Li-ion battery that has a voltage of 10.8 V and 4.0 Ah capacity. Both batteries have protective circuit boards. The Panasonic battery for the Thinkpad 760XD had 12 Panasonic 17500 cells of 0.75 Ah capacity in a 4P3S cOnfiguration. The new Panasonic battery has 6 Panasonic 18650 cells of 2.0 Ah capacity in a 2P3S configuration. The batteries and cells for both models have been evaluated for performance and safety. A comparison of the cells under similar test conditions will be presented. The performance of the cells has been evaluated under different rates of charge and discharge and different temperatures. The cells have been tested under abuse conditions and the safety features in the cells evaluated. The protective circuit board in the battery was also tested under conditions of overcharge, overdischarge, short circuit and unbalanced cell configurations. The results of the studies will be presented in this paper.

Jeevarajan, Judith A.↗
NASA NTRS1980

Internal electrostatic discharge hazard risk assessment to the Galileo orbiter

A worst case assessment was performed on the Command Data System (CDS) multilayer printed circuit board and an output power transformer module in the power subsystem. An estimate of the Jovian environment during the 35 hour orbit insertion was supplied by JPL and used as an input to calculate the electron transport into the Galileo components. A radiation shielding analysis computer code, CHARGE, calculated the electron transport deposition trapped in the anticipated sensitive areas of the multilayer board and transformer module. Based on these trapped charge calculations electric fields were calculated between the identified isolated areas and the spacecraft ground. The results of the assessment of electrostatic discharge (DSD) in the CDS multilayer printed circuit board indicate that the probability of ESD in the FR4 is low. The probability of ESD in the components attached to the multilayer board, however, is uncertain based on a lack of prior experimental data.

Schmidt, R. E.↗
NASA NTRS1989

Low-Inductance Capacitor For Low Temperatures

Planar capacitor made on epoxy/fiberglass printed-circuit board. Planar design and flat copper plates ensure low inductance and low series resistance. Planar construction minimized effects of thermal contraction, and epoxy/fiberglass substrate ensured high breakdown voltage. Design is simple, and this type of capacitor easy for any printed-circuit-board facility to fabricate. Design suitable for any small-capacitance, high-voltage capacitor, whether operating at low or high temperature.

Rhodes, David B.↗
NASA NTRS2007

Driver Code for Adaptive Optics

A special-purpose computer code for a deformable-mirror adaptive-optics control system transmits pixel-registered control from (1) a personal computer running software that generates the control data to (2) a circuit board with 128 digital-to-analog converters (DACs) that generate voltages to drive the deformable-mirror actuators. This program reads control-voltage codes from a text file, then sends them, via the computer s parallel port, to a circuit board with four AD5535 (or equivalent) chips. Whereas a similar prior computer program was capable of transmitting data to only one chip at a time, this program can send data to four chips simultaneously. This program is in the form of C-language code that can be compiled and linked into an adaptive-optics software system. The program as supplied includes source code for integration into the adaptive-optics software, documentation, and a component that provides a demonstration of loading DAC codes from a text file. On a standard Windows desktop computer, the software can update 128 channels in 10 ms. On Real-Time Linux with a digital I/O card, the software can update 1024 channels (8 boards in parallel) every 8 ms.

Rao, Shanti↗
NASA NTRS2004

Multi-level Simulation of a Real Time Vibration Monitoring System Component

This paper describes the development of a custom built Digital Signal Processing (DSP) printed circuit board designed to implement the Advanced Real Time Vibration Monitoring Subsystem proposed by MSFC Transportation Directorate in 2000 for the Space Shuttle Main Engine Advanced Health Management System (AHMS). This Real Time Vibration Monitoring System (RTVMS) is being developed for ground use as part of the AHMS Health Management Computer-Integrated Rack Assembly (HMC-IRA). The HMC-IRA RTVMS design contains five DSPs which are highly interconnected through individual communication ports, shared memory, and a unique communication router that allows all the DSPs to receive digitized data from two multi-channel analog boards simultaneously. This paper will briefly cover the overall board design but will focus primarily on the state-of-the-art simulation environment within which this board was developed. This 16-layer board with over 1800 components and an additional mezzanine card has been an extremely challenging design. Utilization of a Mentor Graphics simulation environment provided the unique board and system level simulation capability to ascertain any timing or functional concerns before production. By combining VHDL, Synopsys Software and Hardware Models, and the Mentor Design Capture Environment, multiple simulations were developed to verify the RTVMS design. This multi-level simulation allowed the designers to achieve complete operability without error the first time the RTVMS printed circuit board was powered. The HMCIRA design has completed all engineering unit testing and the deliverable unit is currently under development.

Roberston, Bryan↗
NASA NTRS2005

Multi-level Simulation of a Real Time Vibration Monitoring System Component

This paper describes the development of a custom built Digital Signal Processing (DSP) printed circuit board designed to implement the Advanced Real Time Vibration Monitoring Subsystem proposed by Marshall Space Flight Center (MSFC) Transportation Directorate in 2000 for the Space Shuttle Main Engine Advanced Health Management System (AHMS). This Real Time Vibration Monitoring System (RTVMS) is being developed for ground use as part of the AHMS Health Management Computer-Integrated Rack Assembly (HMC-IRA). The HMC-IRA RTVMS design contains five DSPs which are highly interconnected through individual communication ports, shared memory, and a unique communication router that allows all the DSPs to receive digitized data fiom two multi-channel analog boards simultaneously. This paper will briefly cover the overall board design but will focus primarily on the state-of-the-art simulation environment within which this board was developed. This 16-layer board with over 1800 components and an additional mezzanine card has been an extremely challenging design. Utilization of a Mentor Graphics simulation environment provided the unique board and system level simulation capability to ascertain any timing or functional concerns before production. By combining VHDL, Synopsys Software and Hardware Models, and the Mentor Design Capture Environment, multiple simulations were developed to verify the RTVMS design. This multi-level simulation allowed the designers to achieve complete operability without error the first time the RTVMS printed circuit board was powered. The HMC-IRA design has completed all engineering and deliverable unit testing. P

Robertson, Bryan A.↗
NASA NTRSDate not supplied

Risk-Based SMA and Modernizing Risk Classification at GSFC

In 2014, in response to a large volume of feedback from industry, the science community, and internal to Goddard Space Flight Center (GSFC), GSFC’s Safety and Mission Assurance (SMA) Directorate began a transition to a risk-based implementation of SMA, departing from its longstanding practice of being primarily driven by a mostly static set of Mission Assurance Requirements. The transition started out with a pilot project involving risk-based acceptance of bare-printed circuit boards that was enormously successful, continued through a complete organizational transformation in 2015, and culminated with the baselining of formal Risk-Based SMA policy in 2016. In this presentation we will describe the risk-based SMA concept, segue into how it shapes a modernization of risk classification that GSFC has rolled out, and provide results from the original pilot project for risk-based SMA, involving the printed circuit board assurance process.

Jesse Leitner↗
NASA NTRS2014

Modular Pulsed Plasma Electric Propulsion System for Cubesats

Current capabilities of CubeSats must be improved in order to perform more ambitious missions. Electric propulsion systems will play a key role due to their large specific impulse. Compared to other propulsion alternatives, their simplicity allows an easier miniaturization and manufacturing of autonomous modules into the nano and pico-satellite platform. Pulsed Plasma Thrusters (PPTs) appear as one of the most promising technologies for the near term. The utilization of solid and non-volatile propellants, their low power requirements and their proven reliability in the large scale make them great candidates for rapid implementation. The main challenges are the integration and miniaturization of all the electronic circuitry into a printed circuit board (PCB) that can satisfy the strict requirements that CubeSats present. NASA Ames and the George Washington University have demonstrated functionality and control of three discrete Micro-Cathode Arc Thrusters (CAT) using a bench top configuration that was compatible with the ARC PhoneSat Bus. This demonstration was successfully conducted in a vaccum chamber at the ARC Environmental Test Laboratory. A new effort will integrate a low power Plasma Processing Unit and two plasma thrusters onto a single printed circuit board that will utilize less than 13 U of Bus volume. The target design will be optimized for the accommodation into the PhoneSatEDISON Demonstration of SmallSatellite Networks (EDSN) bus as it uses the same software interface application, which was demonstrated in the previous task. This paper describes the design, integration and architecture of the proposed propulsion subsystem for a planned Technology Demonstration Mission. In addition, a general review of the Pulsed Plasma technology available for CubeSats is presented in order to assess the necessary challenges to overcome further development.

PCB↗
NASA NTRS1995

A process for preparing an ultra-thin, adhesiveless, multi-layered, patterned polymer substrate

A process for preparing an ultra-thin, adhesiveless, multi-layered, patterned polymer substrate is disclosed. The process may be used to prepare both rigid and flexible cables and circuit boards. A substrate is provided and a polymeric solution comprising a self-bonding, soluble polymer and a solvent is applied to the substrate. Next, the polymer solution is dried to form a polymer coated substrate. The polymer coated substrate is metallized and patterned. At least one additional coating of the polymeric solution is applied to the metallized, patterned, polymer coated substrate and the steps of metallizing and patterning are repeated. Lastly, a cover coat is applied. When preparing a flexible cable and flexible circuit board, the polymer coating is removed from the substrate.

Bryant, Robert G.↗
NASA NTRS2013

Flight Hardware Packaging Design for Stringent EMC Radiated Emission Requirements

This packaging design approach can help heritage hardware meet a flight project's stringent EMC radiated emissions requirement. The approach requires only minor modifications to a hardware's chassis and mainly concentrates on its connector interfaces. The solution is to raise the surface area where the connector is mounted by a few millimeters using a pedestal, and then wrapping with conductive tape from the cable backshell down to the surface-mounted connector. This design approach has been applied to JPL flight project subsystems. The EMC radiated emissions requirements for flight projects can vary from benign to mission critical. If the project's EMC requirements are stringent, the best approach to meet EMC requirements would be to design an EMC control program for the project early on and implement EMC design techniques starting with the circuit board layout. This is the ideal scenario for hardware that is built from scratch. Implementation of EMC radiated emissions mitigation techniques can mature as the design progresses, with minimal impact to the design cycle. The real challenge exists for hardware that is planned to be flown following a built-to-print approach, in which heritage hardware from a past project with a different set of requirements is expected to perform satisfactorily for a new project. With acceptance of heritage, the design would already be established (circuit board layout and components have already been pre-determined), and hence any radiated emissions mitigation techniques would only be applicable at the packaging level. The key is to take a heritage design with its known radiated emissions spectrum and repackage, or modify its chassis design so that it would have a better chance of meeting the new project s radiated emissions requirements.

Lortz, Charlene L.↗
NASA NTRS2015

Packaging Technologies for 500 C SiC Electronics and Sensors: Challenges in Material Science and Technology

This paper presents ceramic substrates and thick-film metallization based packaging technologies in development for 500C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550C. The 96 alumina packaging system composed of chip-level packages and PCBs has been successfully tested with high temperature SiC discrete transistor devices at 500C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC junction field-effect-transistor (JFET) with a packaging system composed of a 96 alumina chip-level package and an alumina printed circuit board was tested on low earth orbit for eighteen months via a NASA International Space Station experiment. In addition to packaging systems for electronics, a spark-plug type sensor package based on this high temperature interconnection system for high temperature SiC capacitive pressure sensors was also developed and tested. In order to further significantly improve the performance of packaging system for higher packaging density, higher operation frequency, power rating, and even higher temperatures, some fundamental material challenges must be addressed. This presentation will discuss previous development and some of the challenges in material science (technology) to improve high temperature dielectrics for packaging applications.

dielectric properties↗