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At least 181 records · Page 10

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NASA NTRS1986

Preliminary test data using the MOS DRO with Si:In detector material

The initial testing performed on the Hughes Metal Oxide Semiconductor Direct Readout (MOS DRO) with a Si:In extrinsic infrared array is described. The testing to date was of a screening nature and the results are primarily qualitative rather than quantitative. At a later date the performance optimization phase will be initiated. An encouraging result is that this response is strongly dependent on the detector temperature, to the extent that thermal transients introduced during the chip readout will affect the performance. A responsivity of 1 A/W at 2.2 microns with a bias of 15 volts, which is well below what is optimum bias, was obtained.

Fowler, A. M.↗

NASA NTRS1986

Inversion layer MOS solar cells

Inversion layer (IL) Metal Oxide Semiconductor (MOS) solar cells were fabricated. The fabrication technique and problems are discussed. A plan for modeling IL cells is presented. Future work in this area is addressed.

Ho, Fat Duen↗

NASA NTRS1986

Modelling short channel mosfets for use in VLSI

In an investigation of metal oxide semiconductor field effect transistor (MOFSET) devices, a one-dimensional mathematical model of device dynamics was prepared, from which an accurate and computationally efficient drain current expression could be derived for subsequent parameter extraction. While a critical review revealed weaknesses in existing 1-D models (Pao-Sah, Pierret-Shields, Brews, and Van de Wiele), this new model in contrast was found to allow all the charge distributions to be continuous, to retain the inversion layer structure, and to include the contribution of current from the pinched-off part of the device. The model allows the source and drain to operate in different regimes. Numerical algorithms used for the evaluation of surface potentials in the various models are presented.

Klafter, Alex↗

NASA NTRS1987

A comparison of VLSI architecture of finite field multipliers using dual, normal or standard basis

Three different finite field multipliers are presented: (1) a dual basis multiplier due to Berlekamp; (2) a Massy-Omura normal basis multiplier; and (3) the Scott-Tavares-Peppard standard basis multiplier. These algorithms are chosen because each has its own distinct features which apply most suitably in different areas. Finally, they are implemented on silicon chips with nitride metal oxide semiconductor technology so that the multiplier most desirable for very large scale integration implementations can readily be ascertained.

Hsu, I. S.↗

NASA NTRS1986

The VLSI design of an error-trellis syndrome decoder for certain convolutional codes

A recursive algorithm using the error-trellis decoding technique is developed to decode convolutional codes (CCs). An example, illustrating the very large scale integration (VLSI) architecture of such a decode, is given for a dual-K CC. It is demonstrated that such a decoder can be realized readily on a single chip with metal-nitride-oxide-semiconductor technology.

Reed, I. S.↗

NASA NTRS1988

Empirical Modeling Of Single-Event Upset

Experimental study presents examples of empirical modeling of single-event upset in negatively-doped-source/drain metal-oxide-semiconductor static random-access memory cells. Data supports adoption of simplified worst-case model in which cross sectionof SEU by ion above threshold energy equals area of memory cell.

Zoutendyk, John A.↗

NASA NTRS1986

Development of 30 micrometers extrinsic silicon multiplexed infrared deterctor array

Two hybrid infrared (IR) detector arrays of antimony-doped silicon (Si:Sb) were produced and tested to evaluate their potential for use in low-background IR astronomy applications. The format of the arrays is 58 x 62 elements, with 76 micron-square pixels. A random-access, switched metal-oxide semiconductor field effect transistor (MOSFET) silicon multiplexer is used to read out the array elements. Reduced-background tests of signal, noise, and noise equivalent power were conducted over the temperature range 3.2 to 12 K. The arrays were found to have good sensitivity and good uniformity.

Orias, G.↗

NASA NTRS1988

Development of a unit cell for a Ge:Ga detector array

Two modules of gallium-doped germanium (Ge:Ga) infrared detectors with integrated multiplexing readouts and supporting drive electronics were designed and tested. This development investigated the feasibility of producing two-dimensional Ge:Ga arrays by stacking linear modules in a housing capable of providing uniaxial stress for enhanced long-wavelength response. Each module includes 8 detectors (1x1x2 mm) mounted to a sapphire board. The element spacing is 12 microns. The back faces of the detector elements are beveled with an 18 deg angle, which was proved to significantly enhance optical absorption. Each module includes a different silicon metal-oxide semiconductor field effect transistor (MOSFET) readout. The first circuit was built from discrete MOSFET components; the second incorporated devices taken from low-temperature integrated circuit multiplexers. The latter circuit exhibited much lower stray capacitance and improved stability. Using these switched-FET circuits, it was demonstrated that burst readout, with multiplexer active only during the readout period, could successfully be implemented at approximately 3.5 K.

Source record↗

NASA NTRS1988

A comparison of VLSI architecture of finite field multipliers using dual, normal, or standard bases

Three different finite-field multipliers are presented: (1) a dual-basis multiplier due to Berlekamp; the Massey-Omura normal basis multiplier; and (3) the Scott-Tavares-Peppard standard basis multiplier. These algorithms are chosen because each has its own distinct features that apply most suitably in different areas. Finally, they are implemented on silicon chips with nitride metal oxide semiconductor technology so that the multiplier most desirable for VLSI implementation can readily be ascertained.

Hsu, I. S.↗

NASA NTRS1988

Radiation resistance and comparative performance of ITO/InP and n/p InP homojunction solar cells

The radiation resistance of ITO/InP cells processed by DC magnetron sputtering is compared to that of standard n/p InP and GaAs homojunction cells. After 20 MeV proton irradiations, it is found that the radiation resistance of the present ITO/InP cell is comparable to that of the n/p homojunction InP cell and that both InP cell types have radiation resistance significantly greater than GaAs. The relatively lower radiation resistance, observed at higher fluence, for the InP cell with the deepest junction depth, is attributed to losses in the cells emitter region. Diode parameters obtained from I sub sc - V sub oc plots, data from surface Raman spectroscopy, and determinations of surface conductivity types are used to investigate the configuration of the ITO/InP cells. It is concluded that thesee latter cells are n/p homojunctions, the n-region consisting of a disordered layer at the oxide semiconductor.

Weinberg, I.↗

NASA NTRS1989

The 5-kW arcjet power electronics

The initial design and evaluation of a 5 kW arcjet power electronics breadboard which as been integrated with a modified 1 kW design laboratory arcjet is presented. A single stage, 5 kW full bridge, pulse width modulated (PWM), power converter was developed which was phase shift regulated. The converter used metal oxide semiconductor field effect transistor (MOSFET) power switches and incorporated current mode control and an integral arcjet pulse ignition circuit. The unoptimized power efficiency was 93.5 and 93.9 percent at 5 kW and 50A output at input voltages of 130 and 150V, respectively. Line and load current regulation at 50A output was within one percent. The converter provided up to 6.6 kW to the arcjet with simulated ammonia used as a propellant.

Gruber, R. P.↗

NASA NTRS1989

5-kW arcjet power electronics

Gruber, R. P.↗

NASA NTRS1990

Calculating Second-Order Effects in MOSFET's

Collection of mathematical models includes second-order effects in n-channel, enhancement-mode, metal-oxide-semiconductor field-effect transistors (MOSFET's). When dimensions of circuit elements relatively large, effects neglected safely. However, as very-large-scale integration of microelectronic circuits leads to MOSFET's shorter or narrower than 2 micrometer, effects become significant in design and operation. Such computer programs as widely-used "Simulation Program With Integrated Circuit Emphasis, Version 2" (SPICE 2) include many of these effects. In second-order models of n-channel, enhancement-mode MOSFET, first-order gate-depletion region diminished by triangular-cross-section deletions on end and augmented by circular-wedge-cross-section bulges on sides.

Benumof, Reuben↗

NASA NTRS1989

Chemical profiling of silicon nitride structures

X ray photoelectron spectroscopy (XPS), spectroscopic ellipsometry (SE), and scanning electron microscopy (SEM) were used to study structural and chemical inhomogeneities in several electronic materials and device structures of relevance to radiation hard electronics. The systems studied include metal nitride oxide semiconductor (MNOS) structures, silicon oxynitride (SiO(x)N(y)) formed by the thermal nitridation of SiO2, and semiconductor on insulator (SOI) structures. Studies of MNOS structures suggest that the effect of H2 annealing is to make the Si3N4/SiO2 interface less abrupt by causing interdiffusion of silanol and silamine groups with subsequent oxynitride formation. Another effect of the annealing appears to be to relieve the strain at the SiO2/Si interface.

Vasquez, R. P.↗

NASA NTRS1988

Radiation resistance and comparative performance of ITO/InP and n/p InP homojunction solar cells

The radiation resistance of ITO/InP cells processed by dc magnetron sputtering is compared to that of standard n/p InP and GaAs homojunction cells. After 20 MeV proton irradiations, it is found that the radiation resistance of the present ITO/InP cell is comparable to that of the n/p homojunction InP cell and that both InP cell types have radiation resistances significantly greater than GaAs. The relatively lower radiation resistance, observed at higher fluence, for the InP cell with the deepest junction depth, is attributed to losses in the cells emitter region. Diode parameters obtained from I sub sc - V sub oc plots, data from surface Raman spectrosocpy, and determinations of surface conductivity type are used to investigate the configuration of the ITO/InP cells. It is concluded that these latter cells are n/p homojunctions, the n-region consisting of a disordered layer at the oxide semiconductor.

Weinberg, I.↗

NASA NTRS1992

FET's Perform Well At Cryogenic Temperatures

New metal-oxide-semiconductor field-effect transistors designed for source-follower preamplifiers operating at liquid-helium temperatures in conjunction with infrared detectors. Lower thresholds and offset give CryoFET's greater dynamic range and linearity than conventional MOSFET's at low temperatures and facilitates pair balancing to reduce offsets in output. Reduces heat loading of cryogenic system, extending life, reliability, and performance of cryogenic infrared instruments.

Sclar, N.↗

NASA NTRS1992

SNS Heterojunctions With New Combinations Of Materials

New combinations of materials proposed for superconductor/normal-metal/superconductor (SNS) heterojunctions in low-temperature electronic devices such as fast switches, magnetometers, and mixers. Epitaxial heterojunctions formed between high-temperature superconductors and either oxide semiconductors or metals. Concept offers alternative to other three-layer heterojunction concepts; physical principles of operation permit SNS devices to have thicker barrier layers and fabricated more easily.

Vasquez, Richard P.↗

NASA NTRS1991

Silicon device performance measurements to support temperature range enhancement

The results of the NPN bipolar transistor (BJT) (2N6023) breakdown voltage measurements were analyzed. Switching measurements were made on the NPN BJT, the insulated gate bipolar transistor (IGBT) (TA9796) and the N-channel metal oxide semiconductor field effect transistor (MOSFET) (RFH75N05E). Efforts were also made to build a H-bridge inverter. Also discussed are the plans that have been made to do life testing on the devices, to build an inductive switching test circuit and to build a dc/dc switched mode converter.

Johnson, R. Wayne↗