Search NASA⌕ Search

SEARCH · Search NASA

Results for “Latchup”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
NASA NTRS2021

Linear Systems LSK389 and LSK489 Dual N-Channel JFET Amplifier Total Ionizing Dose and Single-Event Effects Test Report

The purpose of these tests was to characterize the susceptibility of the LSK389 and LSK489 Dual N-Channel JFET from Linear Systems to Single-Event Latchup due to heavy ions and to Total Ionizing Dose (TID) degradation at -65 °C and intermediate dose rate. The test was carried out to assess suitability of the amplifiers for the Ocean Color instrument (OCI) on the Plankton, Aerosol, Cloud, ocean Ecosystem (PACE) spacecraft.

Ray Ladbury↗
NASA NTRS2021

SEE Test Report for Arizona Microtek AZ88923 High Speed Limiting Post Amplifier

The primary purpose of this testing is to characterize the Texas Instruments AZ88923 post amplifier for susceptibility to single-event latchup (SEL) and other destructive Single-Event Effects (SEE). These data will be used to assess the destructive SEE risk for the OSIRIS-REx Laser Altimeter (OLA). A secondary goal is to assess the susceptibility of the post amplifier to single-event transients (SET) and other nondestructive SEE. In particular, the loss-of-signal feature could give rise to some significant anomalies. However, it is not used on OLA.

Raymond Ladbury↗
NASA NTRS2021

SEE Test Report for Texas Instruments TLV5618 2.7-V to 5.5-V Low-Power Dual 12-Bit Digital-to-Analog Converter with Power Down

The primary purpose of this testing was to characterize the Texas Instruments TLV5618 12-bit digital-to-analog converter (DAC) for single-event latchup (SEL) susceptibility. These data will be used to assess the SEL risk for the OSIRIS-REx Laser Altimeter (OLA). A secondary goal is to assess the susceptibility of the DAC to single-event transients (SET), single-event upsets (SEU), and other nondestructive SEE.

Raymond Ladbury↗
NASA NTRS2022

Single-Event Effects Test Report Texas Instruments, OPA842 Low-Noise Operational Amplifier

Testing was done to characterize the Texas Instruments Operational Amplifiers OPA842 single event effects (SEE) response. The primary SEE concerns for this device are single event latchup (SEL) and single event transients (SETs). Testing focused on determining susceptibility to SEL and characterizing the SET response. Testing occurred on November 11, 2022.

Kaitlyn L Ryder↗
NASA NTRS2004

Tradeoffs in Flight Design Upset Mitigation in State of the Art FPGAs: Hardened by Design vs. Design Level Hardening

This presentation compares and contrasts the effectiveness and the system/designer impacts of the two main approaches to upset hardening: the Actel approach (RTSX-S and RTAX-S) of low-level (inside each flip-flop) triplication and the Xilinx approach (Virtex and Virtex2) of design-level triplication of both functional blocks and voters. The effectiveness of these approaches is compared using measurements made in conjunction with each of the FPGAs' manufacturer: for Actel, published data [1] and for Xilinx, recent results from the Xilinx SEE Test Consortium (note that the author is an active and founding member). The impacts involve Actel advantages in the areas of transistor-utilization efficiency and minimizing designer involvement in the triplication while the Xilinx advantages relate to the ability to custom tailor upset hardness and the flexibility of re-configurability. Additionally, there are currently clear Xilinx advantages in available features such as the number of I/O's, logic cells, and RAM blocks as well as speed. However, the advantage of the Actel anti-fuses for configuration over the Xilinx SRAM cells is that the latter need additional functionality and external circuitry (PROMs and, at least a watchdog timer) for configuration and configuration scrubbing. Further, although effectively mitigated if done correctly, the proton upset-ability of the Xilinx FPGAs is a concern in severe proton-rich environments. Ultimately, both manufacturers' upset hardening is limited by SEFI (single-event functional interrupt) rates where it appears the Actel results are better although the Xilinx Virtex2-family result of about one SEFI in 65 device-years in solar-min GCR (the more intense part of the galactic cosmic-ray background) should be acceptable to most missions

radiation effects↗
NASA NTRS2012

Initial SEE Testing of Maestro

We have reported on initial SEE sensitivity of the full 49-core Maestro device. Supporting the low-level structures and qualitative system observation goals of phase 1 of testing. Observed sensitivities found to be consistent with Boeing predictions. Highlighted by the L1 data cache sensitivity which drives the rates on the current Maestro device. Presented details to the hardware and software setups that show where the limitations - highlighting future work. Key future work includes testing with memory and IO ports.

cache sensitivity↗
NASA NTRS2017

An Improved SEL Test of the ADV212 Video Codec

Single-event effect (SEE) test data is presented on the Analog Devices ADV212. Focus is given to the test setup used to improve data quality and validate single-event latch-up (SEL) protection circuitry.

Single-event effect (SEE); microelectronic devices↗
NASA NTRS2020

Threats to Resiliency of Redundant Systems Due to Destructive SEE

Destructive SEE pose serious challenges for the reliable use of COTS devices in space systems. We used system-level modeling to determine SEL rates that would likely compromise system reliability, resilience and capabilities. We then assembled a representative dataset of COTS CMOS parts and used nonparametric statistical techniques to assess the threat posed to redundant systems by destructive SEE.

single-event effects↗