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A statistical summary of electrical characterization was performed on JAN diodes and transistors. Parameters are presented with test conditions, mean, standard deviation, lowest reading, 10% point, 90% point and highest reading.
A statistical summary of the electrical characterization of diodes and transistors is presented. Each parameter is presented with test conditions, mean, standard deviation, lowest reading, 10% point (where 10% of all readings are equal to or less than the indicated reading), 90% point (where 90% of all readings are equal to or less than indicated reading) and the highest reading.
A field effect transistor is constructed by placing a semi-conductor layer on an insulating substrate so that the gate region is separated from source and drain regions. The gate electrode and gate region of the layer are of generally reduced length, the gate region being of greatest length on its surface closest to the gate electrode. This is accomplished by initially creating a relatively large gate region of one polarity, and then reversing the polarity of a central portion of this gate region by ion bombardment, thus achieving a narrower final gate region of the stated configuration.
The effect of power/temperature step stress when applied to the transistor JANTX2N2905A manufactured by Texas Instruments and Motorola is reported. A total of 48 samples from each manufacturer was submitted to the process outlined. In addition, two control sample units were maintained for verification of the electrical parametric testing. All test samples were subjected to the electrical tests outlined in Table 2 after completing the prior power/temperature step stress point.
The effect of power/temperature step stress when applied to a field effect transistor JANTX2N4856 manufactured by Texas Instruments and Teledyne was evaluated. A total of 48 samples from each manufacturer was submitted to the process. In addition, two control units were maintained for verification of the electrical parametric testing.
Data for the purpose of evaluating the effect of power/temperature step stress when applied to a variety of semiconductor devices are presented. The transistor JANTX2N3637 manufactured by Transitron and Motorola is studied. A total of 48 samples from Transitron and 41 samples from Motorola were submitted to the process. In addition, two control sample units were maintained for verification of the electrical parametric testing. Results are reported.
Data on the effect of power/temperature step stress when applied to the dual transistor JANTX2N2920 manufactured by Fairchild and National Semiconductor are presented. Fifty one (51) samples from Fairchild and 44 from National Semiconductor were submitted to the process outlined. In addition, two control sample units were maintained for verification of the electrical parametric testing.
Reliability analysis of the transistor JANTX2N4150 manufactured by General Semiconductor and Transitron is reported. The discrete devices were subjected to power and temperature step stress tests and then to electrical tests after completing the power/temperature step stress point. Control sample units were maintained for verification of the electrical parametric testing. Results are presented.
Power/temperature step stress was applied to the transistor JANTX2N2432A manufactured by Crystalonics and Texas Instruments. A total of 48 samples from each manufacturer were submitted to the process outlined. In addition, two control sample units were maintained for verification of the electrical parametric testing. All test samples were subjected to the electrical tests after completing the prior power/temperature step stress point.
The effect was studied of power/temperature step stress when applied to the PNP transistor JANTX2N2605 manufactured by Raytheon and National Semiconductor. Test results and failure analyses are included.
The effect of power/temperature step stress when applied to the dual transistor JANTX2N2060 manufactured by Raytheon and Motorola is reported. A total of 48 samples from each manufacturer were submitted to the process. In addition, two control sample units were maintained for verification of the electrical parametric testing. All test samples were subjected to the electrical tests after completing the prior power/temperature step stress point. Results are given.
Power/temperature step stress was applied to the dual transistor JANTX2N2219A manufactured by Texas Instruments and National Semiconductor. A total of 48 samples from each manufacturer were submitted to the process outlined. In addition, two control sample units were maintained for verification of the electrical parametric testing. All test samples were subjected to electrical tests after completing the prior power/temperature step stress point.
The effect is reported of power/temperature step stress when applied to the transistor JANTX2N2369A manufactured by Raytheon and National Semiconductor. A total of 48 samples from each manufacturer was submitted to the process. In addition, two control sample units were maintained for verification of the electrical parametric testing. The power/thermal stress tests are described, and failure analyses are presented.
Data compiled for the purpose of evaluating the effect of power/temperature step stress when applied to the transistor JANTX2N2945A manufactured by Raytheon and Teledyne is presented. A total of 48 samples from each manufacturer was divided equally (16 per group) into three groups and submitted to the processes outlined. In addition, two control units were maintained for verification of the electrical parametric testing.
The effect of power/temperature step stress when applied to the transistor JANTX2N2484, manufactured by Raytheon and Teledyne was evaluated. Forty-eight samples from each manufacturer were divided equally (16 per group) into three groups and submitted to the processes outlined. In addition, two control sample units were maintained for verification of the electrical parametric testing.
A manufacturer was contracted to screen 125 transistors capable of withstanding the high level inductive voltages obtained when switching inductive loads. Planned differences included a change in die bonding to comply with NASA's desire for hard solder die attachment which further necessitated a change in package to conform to the required die mounting system. Evaluation of the electrical performance and recommended changes were made during the preliminary build phase of the program. The following sections are outlined: (1) narrative outline; (2) customer data summary and X-ray reports; (3) device specification; (4) failure analysis reports; (5) test facilities list; and (6) test measurement data.
A model for bipolar junction power switching transistors whose parameters can be readily obtained by the circuit design engineer, and which can be conveniently incorporated into standard computer-based circuit analysis programs is presented. This formulation results from measurements which may be made with standard laboratory equipment. Measurement procedures, as well as a comparison between actual and computed results, are presented.
A rigorous analytic evaluation of an emitter model that includes Auger recombination but excludes bandgap narrowing is presented. It is shown that such a model cannot explain the experimentally observed values of the open-circuit voltage in p-n-junction silicon solar cells. Thus physical mechanisms in addition to Auger recombination are responsible for the experimentally observed values of the open-circuit voltage in silicon solar cells and the common-emitter current gain in bipolar transistors.